MEMS transducer amplifiers
AssigneeCirrus Logic, Inc.
InventorsHynek Saman, James Thomas Deas
Life of this patent
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Abstract
An amplifier circuit has a transducer biasing node for outputting a transducer bias voltage for biasing the capacitive transducer and a signal node for receiving the input signal. An amplifier arrangement comprising a feedback resistor network provides an amplified output signal. A voltage buffer provides a buffered bias voltage at a buffer node which is connected to a terminal of the feedback resistor network, to at least partly define the quiescent level of the output signal. The buffer node is electrically coupled to the transducer biasing node via a capacitance which may form part of a bias filter.
Claims20
An amplifier circuit for amplifying an input signal from a capacitive transducer comprising:
- a transducer biasing node for outputting a transducer bias voltage for biasing the capacitive transducer;
- a signal node for receiving the input signal from the capacitive transducer;
- an amplifier arrangement coupled to the signal node to amplify the input signal and generate an output signal at an output node, the amplifier arrangement comprising a feedback resistor network;
- a voltage buffer configured to generate a buffered bias voltage at a buffer node;
- wherein a terminal of the feedback resistor network is electrically coupled to the buffer node to receive said buffered bias voltage;
- and
- a first capacitance is electrically coupled between the transducer biasing node and the buffer node.
An amplifier apparatus comprising:
- a MEMS capacitive transducer connected between a transducer biasing node and a signal node;
- an amplifier arrangement coupled to the signal node to amplify the input signal, the amplifier arrangement comprising a feedback resistor network;
- and
- a voltage buffer configured to generate a buffered bias voltage at a buffer node;
- wherein a terminal of the feedback resistor network is electrically coupled to the buffer node to receive said buffered bias voltage;
- a signal path between the buffer node and the transducer biasing node comprising a first capacitor.
An amplifier circuit for amplifying an input signal from a capacitive transducer comprising:
- a signal node for receiving the input signal;
- a transducer biasing node for outputting a transducer bias voltage for biasing the capacitive transducer;
- an input transistor having a gate terminal coupled to the signal node;
- an amplifier having an input connected to a drain terminal of the input transistor and an output connected to a source terminal of the input transistor via a first feedback resistor;
- a defined current element for defining a gate-to-drain current through the input transistor;
- a voltage buffer configured to generate a buffered bias voltage at a buffer node;
- a second feedback resistor connected between the buffer node and the source terminal of the input transistor;
- and
- a first capacitance electrically coupled between the transducer biasing node and the buffer node.
Dependencies are inferred from the claim text.