US 10,375,362 B2Granted

Imaging device and camera system

AssigneePanasonic Intellectual Property Management Co., Ltd.

InventorSanshiro Shishido

Life of this patent

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Abstract

An imaging device includes: a pixel array including first and second pixels, each pixel including a photoelectric converter converting light into charge and a detection circuit detecting the charge; a first voltage supply circuit supplying a first voltage to the first pixel such that an electric potential of the first electrode is set to a first electric potential at a point of time at which a charge accumulation period for the first pixel starts; a second voltage supply circuit supplying a second voltage to the second pixel such that an electric potential of the first electrode of the second pixel is set to a second electric potential different from the first electric potential at a point of time at which a charge accumulation period for the second pixel starts; and an addition circuit adding together signals generated in the first and second pixels.

Claims12

Dependent claims

An imaging device comprising:

a pixel array including a plurality of pixels including a first pixel and a second pixel, each pixel including a photoelectric converter that converts light into charge and a detection circuit that detects the charge, the photoelectric converter including a first electrode, a second electrode facing the first electrode, and a photoelectric conversion layer between the first electrode and the second electrode;
a first voltage supply circuit that supplies a first voltage to the first pixel such that an electric potential of the first electrode is set to a first electric potential at a point of time at which a charge accumulation period for the first pixel starts;
a second voltage supply circuit that supplies a second voltage to the second pixel such that an electric potential of the first electrode of the second pixel is set to a second electric potential different from the first electric potential at a point of time at which a charge accumulation period for the second pixel starts;
and
an addition circuit that adds together a signal generated in the first pixel and a signal generated in the second pixel.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application: 15/876,262Filed 22 Jan 2018
Priority: JP 2017-0190343 Feb 2017
Published: US 2018/0227551 A19 Aug 2018
Granted: 6 Aug 2019
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

H04N 25/76
SSIS architectures; Circuits associated therewith: addressed sensors, e.g. MOS or CMOS sensors
H04N 23/11
For generating image signals from different wavelengths: for generating image signals from visible and infrared light wavelengths
H04N 25/00
Circuitry of solid-state image sensors [ssis]
H04N 25/10
Circuitry of solid-state image sensors [SSIS]; Control thereof: for transforming different wavelengths into image signals

Family

US 2018/0227551 A1Pre-grant publication · published 9 Aug 2018
US 10,375,362 B2This patent

From the US filing history. Foreign family members aren’t listed.

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