Systems for selecting a time reference

A packet processing circuit for processing data packets, the packet processing circuit comprising:

• time signal selection logic including
• a plurality of multiplexers coupled together to receive a plurality of time reference signals into a plurality of input terminals and select one time reference signal on an output terminal, wherein at least one of the plurality of time reference signals is an external time reference signal from an external time reference generator coupled to one input terminal of the plurality of input terminals;
• and
• a configuration register coupled to the plurality of multiplexers, the configuration register to receive and store bits to generate a plurality of selection signals coupled to a plurality of select input terminals of the plurality of multiplexers to select the one time reference signal on the output terminal.

A system comprising:

• a router to receive and transmit data packets plurality of multiplexers coupled together to receive a plurality of time reference
• a switch coupled to the router,
• a time reference generator coupled to the router;
• a plurality coprocessing cards coupled in communication with the switch and the time reference generator;
• a plurality of small form pluggable time modules coupled to the plurality coprocessing cards;
• wherein the switch receives data signal packets, reads IP addresses, and routes the data signal packets to the plurality coprocessing cards;
• and
• wherein the time reference generator generates an external time reference signal communicated to each of the plurality of small form pluggable time modules.