Power on reset circuit and high frequency communication device

A high frequency communication device, comprising:

• a power on reset circuit that includes:
• a reference voltage generating circuit that includes an operational amplifier, wherein the reference voltage generating circuit is configured to:
• generate a reference voltage;
• and
• output, as a control voltage, a first voltage at an output node of the operational amplifier, wherein a voltage rise of the first voltage at the output node is slower than a voltage rise of the reference voltage;
• a comparison voltage generating circuit that includes a resistive divider circuit;
• and
• a comparison circuit, wherein
• the resistive divider circuit includes:
• an inverter circuit configured to invert a polarity of the control voltage;
• and
• at least two resistive elements connected in series,
• the resistive divider circuit is configured to:
• obtain a divided voltage at a common connection node based on a power source voltage and the control voltage that has the inverted polarity, wherein the common connection node is between the at least two resistive elements;
• output the divided voltage as a comparison voltage;
• and
• supply an enable signal to the comparison circuit based on the control voltage, and
• the comparison circuit is configured to:
• compare the comparison voltage with the reference voltage based on the enable signal;
• and
• output an operation signal based on the comparison voltage that exceeds the reference voltage.