Boost converters having self-adaptive maximum duty-cycle-limit control
AssigneeQUALCOMM Incorporated
InventorsSubbarao Surendra Chakkirala, Jiwei Chen
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Abstract
In one embodiment, a control circuit adjusts a duty cycle of a boost converter and comprises a duty cycle limiter generator configured to receive an input voltage provided to the boost converter and to generate a control signal to be provided to the boost converter for adjusting the duty cycle of the boost converter to control the output voltage of the booster converter in response to the input voltage. In one embodiment, the maximum duty cycle limit generator further generates the maximum duty cycle signal in response to an output voltage of the boost converter.
Claims20
A control circuit for adjusting a duty cycle of a boost converter comprising:
- an R-S flip flop with a set input coupled to receive a boost clock signal, a reset input coupled to receive a reset input signal, and an output to output the duty cycle to the boost converter;
- an OR gate coupled to provide the reset input signal to the reset input, the OR gate receiving a feedback loop input signal and a maximum duty cycle signal, the OR gate asserting the reset input signal when either the feedback loop input signal is asserted or the maximum duty cycle signal is asserted;
- and a maximum duty cycle limit generator configured to receive an input voltage provided to the boost converter and to generate, based on the input voltage, the maximum duty cycle signal to be provided to the R-S flip flop for adjusting the duty cycle of the boost converter in response to the input voltage and to adjust a gain of the boost converter to control an output voltage of the boost converter, wherein the maximum duty cycle signal limits the duty cycle of the boost converter, wherein the R-S flip flop is set by the boost clock signal input to the set input, the boost clock signal being derived based on a 50% duty cycle signal based on a system clock, and reset by either the feedback loop input signal or the maximum duty cycle signal, whichever is asserted first.
A method for adjusting a duty cycle of a boost converter, the method comprising:
- receiving an input voltage provided to the boost converter;
- generating, based on the input voltage, a maximum duty cycle signal;
- adjusting the duty cycle of the boost converter to be limited by the maximum duty cycle signal;
- and adjusting a gain of the boost converter based on the duty cycle adjustment to control the output voltage of the boost converter;
- asserting a signal to the boost converter with the duty cycle determined by the shorter of the adjusted duty cycle or the maximum duty cycle signal, wherein asserting the signal includes operating an R-S flip flop that is set by the boost clock signal, the boost clock signal being derived based on a 50% duty cycle signal based on a system clock, and is reset by either the adjusted duty cycle or the maximum duty cycle signal, whichever is asserted first.
A control circuit for adjusting a duty cycle of a boost converter comprising:
- means for receiving an input voltage provided to the boost converter;
- means for generating a maximum duty cycle signal to be provided to the boost converter for adjusting the duty cycle of the boost converter in response to the input voltage to adjust a gain of the boost converter to control the output voltage of the boost converter;
- means for providing an adjusted duty cycle based on an output voltage of the boost converter;
- and means for providing a signal to the boost converter where the duty cycle of the signal is the shorter of the adjusted duty cycle or the maximum duty cycle signal, wherein the maximum duty cycle signal limits the duty cycle of the boost converter, and wherein the means for providing a signal to the boost converter includes an R-S flip flop that is set by a boost clock signal input, the boost clock signal being derived based on a 50% duty cycle signal based on a system clock, and reset by either the adjusted duty cycle or the maximum duty cycle signal, whichever is asserted first.
Dependencies are inferred from the claim text.