Methods of shielding an embedded MRAM array on an integrated circuit product comprising CMOS based transistors

Abstract

One illustrative method disclosed herein includes forming an MRAM memory array and a plurality of peripheral circuits for an integrated circuit product above a semiconductor substrate, forming a patterned layer of a metal-containing shielding material above the substrate, the patterned layer of metal-containing shielding material covering the MRAM memory array while leaving an area above the plurality of peripheral circuits exposed, and, with the patterned layer of metal-containing shielding material in position, performing a silicon dangling bond passivation anneal process on the integrated circuit product.

Dependencies are inferred from the claim text.