Semiconductor device

A semiconductor device, comprising

• a substrate;
• a first semiconductor region of a first conductivity type, in the substrate;
• a second semiconductor region of a second conductivity type, in the substrate, the second semiconductor region being selectively disposed in a surface layer of one main surface of the first semiconductor region, the second semiconductor region having a contact region;
• a first electrode in contact with the contact region of the second semiconductor region;
• a third semiconductor region of the first conductivity type disposed in a surface layer on another main surface of the first semiconductor region, the third semiconductor region having an impurity concentration higher than an impurity concentration of the first semiconductor region;
• a plurality of fourth semiconductor regions of the second conductivity type disposed in the first semiconductor region, the fourth semiconductor regions being disposed closer to the one main surface than is the third semiconductor region, the fourth semiconductor regions being disposed inside and outside the contact region in a plan view of the semiconductor device, the fourth semiconductor regions extending in a direction parallel to the another main surface and being spaced from each other by gaps, the plurality of fourth semiconductor regions including
• a plurality of first fourth semiconductor regions, each of which is disposed inside of the contact region, and
• a plurality of second fourth semiconductor regions, each of which is disposed outside of the contact region;
• and
• a second electrode in contact with the third semiconductor region, wherein
• the semiconductor device includes first to fourth areas in the plan view,
• the first area being outside of the contact region, and having an area size A20,
• the second area being a total area of surfaces of the second fourth semiconductor regions, and having an area size A21 in total,
• the third area being inside of the contact region, and having an area size A10,
• the fourth area being a total area of surfaces of the first fourth semiconductor regions and having an area size A11 in total, and
• the area sizes A20, A21, A10 and A11 satisfy A21/A20<A11/A10.

A semiconductor device, comprising:

• a substrate;
• a first semiconductor region of a first conductivity type, in the substrate;
• a second semiconductor region of a second conductivity type, in the substrate, the second semiconductor region being selectively disposed in a surface layer of one main surface of the first semiconductor region, the second semiconductor region having a contact region;
• a first electrode in contact with the contact region of the second semiconductor region;
• a third semiconductor region of the first conductivity type disposed in a surface layer on another main surface of the first semiconductor region, the third semiconductor region having an impurity concentration higher than an impurity concentration of the first semiconductor region;
• a fourth semiconductor region of the second conductivity type disposed in the first semiconductor region, the fourth semiconductor region being disposed closer to the one main surface than is the third semiconductor region, the fourth semiconductor region being disposed at least within the contact region in a plan view of the semiconductor device;
• and
• a second electrode in contact with the third semiconductor region, wherein
• a distance between an outermost periphery of the contact region and an outermost periphery of the fourth semiconductor region within the contact region in the plan view is equal to or greater than a diffusion length of a minority carrier.

A semiconductor device, comprising:

• a substrate;
• a first semiconductor region of a first conductivity type, in the substrate;
• a second semiconductor region of a second conductivity type, in the substrate, the second semiconductor region being selectively disposed in a surface layer of one main surface of the first semiconductor region, the second semiconductor region having a contact region;
• a first electrode in contact with the contact region of the second semiconductor region;
• a third semiconductor region of the first conductivity type disposed in a surface layer on another main surface of the first semiconductor region, the third semiconductor region having an impurity concentration higher than an impurity concentration of the first semiconductor region;
• a fourth semiconductor region of the second conductivity type disposed in the first semiconductor region, the fourth semiconductor region being disposed closer to the one main surface than is the third semiconductor region, the fourth semiconductor region being disposed at least within the contact region in a plan view of the semiconductor device;
• a second electrode in contact with the third semiconductor region;
• and
• a fifth semiconductor region of the first conductivity type, the fifth semiconductor region having an impurity concentration higher than the impurity concentration of the first semiconductor region and lower than the impurity concentration of the third semiconductor region, the fifth semiconductor region being disposed in the first semiconductor region, and being closer to the one main surface than is the fourth semiconductor region, wherein
• an outermost periphery of the third semiconductor region is located further inside of the semiconductor device than is an outermost periphery of the first semiconductor region in the plan view, and
• the fifth semiconductor region contacts the second electrode outside of the third semiconductor region in the plan view.

A semiconductor device, comprising:

• a substrate;
• a first semiconductor region of a first conductivity type, in the substrate;
• a second semiconductor region of a second conductivity type, in the substrate, the second semiconductor region being selectively disposed in a surface layer of one main surface of the first semiconductor region, the second semiconductor region having a contact region;
• a first electrode in contact with the contact region of the second semiconductor region;
• a third semiconductor region of the first conductivity type disposed in a surface layer on another main surface of the first semiconductor region, the third semiconductor region having an impurity concentration higher than an impurity concentration of the first semiconductor region;
• a fourth semiconductor region of the second conductivity type disposed in the first semiconductor region, the fourth semiconductor region being disposed closer to the one main surface than is the third semiconductor region, the fourth semiconductor region being disposed at least within the contact region in a plan view of the semiconductor device;
• a second electrode in contact with the third semiconductor region;
• and
• a fifth semiconductor region of the first conductivity type, the fifth semiconductor region having an impurity concentration higher than the impurity concentration of the first semiconductor region and lower than the impurity concentration of the third semiconductor region, the fifth semiconductor region being disposed in the first semiconductor region, and being closer to the one main surface than is the fourth semiconductor region;
• and
• a sixth semiconductor region of the second conductivity type disposed in the fifth semiconductor region, the sixth semiconductor region being disposed outside of the third semiconductor region in the plan view, and being spaced from each of the third semiconductor region and the fourth semiconductor region.

A semiconductor device, comprising:

• a substrate;
• a first semiconductor region of a first conductivity type, in the substrate;
• a second semiconductor region of a second conductivity type, in the substrate, the second semiconductor region being selectively disposed in a surface layer of one main surface of the first semiconductor region, the second semiconductor region having a contact region;
• a first electrode in contact with the contact region of the second semiconductor region;
• a third semiconductor region of the first conductivity type disposed in a surface layer on another main surface of the first semiconductor region, the third semiconductor region having an impurity concentration higher than an impurity concentration of the first semiconductor region;
• a fourth semiconductor region of the second conductivity type disposed in the first semiconductor region, the fourth semiconductor region being disposed closer to the one main surface than is the third semiconductor region, the fourth semiconductor region being disposed at least within the contact region in a plan view of the semiconductor device;
• a second electrode in contact with the third semiconductor region;
• and
• a fifth semiconductor region of the first conductivity type, the fifth semiconductor region having an impurity concentration higher than the impurity concentration of the first semiconductor region and lower than the impurity concentration of the third semiconductor region, the fifth semiconductor region being disposed in the first semiconductor region, and being closer to the one main surface than is the fourth semiconductor region, wherein
• the fifth semiconductor region is formed by a plurality of proton irradiation processes, and includes a plurality of fifth semiconductor regions, at least one of the fifth semiconductor regions having a depth different from a depth of another one of the fifth semiconductor regions, relative to the another main surface.

A semiconductor device, comprising:

• a substrate;
• a first semiconductor region of a first conductivity type, in the substrate;
• a second semiconductor region of a second conductivity type, in the substrate, the second semiconductor region being selectively disposed in a surface layer of one main surface of the first semiconductor region, the second semiconductor region having a contact region;
• a first electrode in contact with the contact region of the second semiconductor region;
• a third semiconductor region of the first conductivity type disposed in a surface layer on another main surface of the first semiconductor region, the third semiconductor region having an impurity concentration higher than an impurity concentration of the first semiconductor region;
• a fourth semiconductor region of the second conductivity type disposed in the first semiconductor region, the fourth semiconductor region being disposed closer to the one main surface than is the third semiconductor region, the fourth semiconductor region being disposed at least within the contact region in a plan view of the semiconductor device;
• a second electrode in contact with the third semiconductor region;
• an edge termination structure portion;
• and
• an active region in which a main current flows and that keeps a voltage thereof lower than a breakdown voltage, the active region being enclosed by the edge termination structure portion, wherein
• the fourth semiconductor region is disposed in the active region, and
• the active region has an avalanche breakdown voltage lower than an avalanche breakdown voltage of the edge terminal structure portion.

A semiconductor device, comprising:

• a substrate;
• a first semiconductor region of a first conductivity type, in the substrate;
• a second semiconductor region of a second conductivity type, in the substrate, the second semiconductor region being selectively disposed in a surface layer of one main surface of the first semiconductor region, the second semiconductor region having a contact region;
• a first electrode in contact with the contact region of the second semiconductor region;
• a third semiconductor region of the first conductivity type disposed in a surface layer on another main surface of the first semiconductor region, the third semiconductor region having an impurity concentration higher than an impurity concentration of the first semiconductor region;
• a fourth semiconductor region of the second conductivity type disposed in the first semiconductor region, the fourth semiconductor region being disposed closer to the one main surface than is the third semiconductor region, the fourth semiconductor region being disposed at least within the contact region in a plan view;
• a second electrode in contact with the third semiconductor region;
• and
• a solder layer disposed on the second electrode at a side opposite to the third semiconductor region so that the semiconductor device is bonded to an other element through the solder layer and the second electrode, the solder layer covering at least a portion of a side surface of the first semiconductor region from the second electrode.