Power amplifier ramping and power control with forward and reverse back-gate bias

A method for adjusting power amplification in a circuit structure, the method comprising:

• applying one of a forward or a reverse voltage bias to first and second transistors in a power amplifier (PA) circuit at back-gate regions thereof during operation in a dormant mode, the back-gate regions of the first and second transistors including a doped substrate separated from a channel region by a buried insulator layer;
• operating the circuit structure in an active mode;
• and
• applying the other of the forward or the reverse voltage bias to the back-gate regions of the first and second transistors in the power amplifier (PA) circuit while operating the circuit structure in the active mode to produce a continuously sloped power ramping profile.

A circuit structure comprising:

• a power amplifier (PA) circuit having first and second transistors, each of the first and second transistors including:
• a dopant-implanted substrate, the dopant-implanted substrate defining a back-gate region;
• a buried insulator layer positioned on the dopant-implanted substrate, and
• a fully-depleted semiconductor-on-insulator (FDSOI) layer positioned on the buried insulator layer, wherein the buried insulator layer separates the FDSOI layer from the back-gate region, wherein the FDSOI layer includes a source region, a channel region, and a drain region;
• and
• an analog voltage source electrically coupled to the back-gate regions of the first and second transistors of the PA circuit, such that the analog voltage source alternatively supplies a forward bias voltage or a reverse bias voltage to the back-gate regions of the first and second transistors of the PA circuit to produce a continuously sloped power ramping profile.