Semiconductor devices and methods of manufacturing the same

A semiconductor device, comprising:

• a substrate having a cell region and a peripheral region;
• a first isolation layer buried in a first upper portion of the substrate, the first upper portion being in the peripheral region;
• a second isolation layer buried in a second upper portion of the substrate, the second upper portion being in the cell region, and the second isolation layer extending along a first direction substantially parallel to a top surface of the substrate;
• an insulation layer pattern buried in the second upper portion, the insulation layer pattern extending along a second direction, and the second direction being substantially parallel to the top surface of the substrate and substantially perpendicular to the first direction,
• the insulation layer pattern having a lower surface higher than a lower surface of the second isolation layer, and
• the insulation layer pattern applying a stress to a portion of the substrate adjacent thereto;
• and
• a gate structure on the substrate in the cell region;
• wherein the gate structure extends along the second direction in the second upper portion, and
• the gate structure includes,
• a gate insulation layer on a bottom and a sidewall of a gate trench;
• a gate electrode on the gate insulation layer, the gate electrode filling a lower portion of the gate trench;
• and
• a gate mask on the gate electrode, the gate mask filling an upper portion of the gate trench;
• and
• wherein a width of a bottom portion of the insulation layer pattern is greater than a width of a top portion of the insulation layer pattern, and the width of the top portion of the insulation layer pattern is less than a width of a top of the gate trench.