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US 10,374,049 B2Granted
Heat management in a multi-finger FET
AssigneeAnalog Devices, Inc.
InventorRobert R. Norton
Life of this patent
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AssigneeAnalog Devices, Inc.
InventorRobert R. Norton
Estimating the term…
The present disclosure addresses thermal issues in a multi gate finger field-effect transistor (FET) by providing a multi-gate finger FET arrangement where the respective distances between the multiple gate fingers are modulated along the device, such that the distances between the gate fingers in or towards the middle of the device are greater than the distances between the gate fingers at the or towards the edge of the device. By providing the greater distances between gate fingers located in or towards the middle of the device then improved thermal management properties are obtained, and the device as a whole is maintained cooler than would otherwise be the case, with associated improvements in device lifetimes.
A transistor device configured for thermal energy management, the transistor device comprising a plurality of active regions formed within a semiconductor substrate, the active regions being respectively separated by other regions having electrode fingers formed thereon, the electrode fingers being electrically connected to a common gate terminal and comprising conductive elements separated one from another by respective inter-electrode distances, at least three inter-electrode distances increasing from each of two opposing edges of the transistor device towards a middle of the transistor device.
A multi-gate finger field-effect transistor (FET) configured for power amplification applications that raise thermal energy levels within the FET during operation, the multi-gate finger FET comprising:
A multi-gate transistor having multiple gate electrodes formed over respective channel regions, the multiple gate electrodes being electrically connected to a common gate terminal and separated from each other by inter-gate distances, wherein the inter-gate distances increase from opposing edges of the multi-gate transistor towards a middle of the multi-gate transistor, and wherein at least first, second and third consecutive inter-gate distances between at least four of the multiple gate electrodes increase from distance to distance such that the third inter-gate distance is larger than the second inter-gate distance, and the second inter-gate distance is larger than the first inter-gate distance.
A transistor device configured to manage heat dissipation thereacross, the transistor device comprising:
Dependencies are inferred from the claim text.