Array substrate, display panel and display device

An array substrate, comprising:

• a display area, a non-display area surrounding the display area, at least two gate lines in the display area, a gate driving circuit and at least two gate fan-out lines in the non-display area, respectively, wherein:
• one end of each of the gate fan-out lines is electrically connected with one of at least two signal outputs of the gate driving circuit and the other end of each of the gate fan-out lines is electrically connected with one of the gate lines;
• and
• a first gate fan-out line of the gate fan-out lines overlaps the gate driving circuit in an overlapping area outside a mutual electrical connection area, and a portion of the first gate fan-out line in the overlapping area and the gate driving circuit are arranged in different layers;
• wherein the array substrate further comprises at least two touch signal lines in the display area;
• and
• the portion of the first gate fan-out line inside the overlapping area and the touch signal lines are arranged in the same layer;
• wherein the array substrate further comprises an underlying substrate, a first organic insulated layer and a first inorganic insulated layer;
• the first gate fan-out line is located on one side of the gate driving circuit farthest away from the underlying substrate, the first organic insulated layer and the first inorganic insulated layer are located between the first gate fan-out line and the gate driving circuit, and the first organic insulated layer is located on one side of the first inorganic insulated layer farthest away from the underlying substrate;
• and
• the first gate fan-out line is electrically connected with the corresponding signal output through a via hole.

An array substrate, comprising:

• a display area, a non-display area surrounding the display area, at least two gate lines in the display area, a gate driving circuit and at least two gate fan-out lines in the non-display area, respectively, wherein:
• one end of each of the gate fan-out lines is electrically connected with one of at least two signal outputs of the gate driving circuit and the other end of each of the gate fan-out lines is electrically connected with one of the gate lines;
• and
• a first gate fan-out line of the gate fan-out lines overlaps the gate driving circuit in an overlapping area outside a mutual electrical connection area, and a portion of the first gate fan-out line in the overlapping area and the gate driving circuit are arranged in different layers;
• wherein:
• the portion of the first gate fan-out line outside the overlapping area and a portion of the first gate fan-out line inside the overlapping area are arranged in different layers.