3-D semiconductor device and method for manufacturing the same

A 3-D semiconductor device comprising a plurality of memory cells and a plurality of selection transistors, each of said plurality of memory cells comprises:

• a channel layer, distributed along a direction perpendicular to a substrate surface;
• a plurality of inter-layer insulating layers and a plurality of gate stack structures, alternately laminated along a sidewall of the channel layer;
• a plurality of floating gates, located between the plurality of inter-layer insulating layers and the sidewall of the channel layer;
• a plurality of drains, located at the top of the channel layer;
• and a source, located in the said substrate and between every two adjacent memory cells of the said plurality of memory cells;
• and further comprising a discrete floating gate spacer between each of the plurality of the floating gates and the channel layer.