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US 10,373,921 B2Granted
Power gate circuits for semiconductor devices
AssigneeMicron Technology, Inc.
InventorYasushi Matsubara
Life of this patent
Estimating the term…
Abstract
Apparatuses and methods for gate power to circuits of semiconductor devices are described. An example apparatus includes a substrate, a first wiring and a second wiring, and a plurality of transistors. The first wiring may be supplied with a power voltage, and the first wiring is formed over the substrate and is elongating in a first direction. The second wiring may be formed between the substrate and the first wiring, and vertically overlapping the first wiring with the second wiring elongating in the first direction. The plurality of transistors are vertically coupled between the first wiring and the second wiring.
Claims17
An apparatus, comprising:
- a substrate;
- a first wiring supplied with a power voltage, the first wiring being formed over the substrate and elongating in a first direction;
- a second wiring formed between the substrate and the first wiring with vertically overlapping the first wiring, the second wiring elongating in the first direction;
- a plurality of transistors vertically coupled between the first wiring and the second wiring;
- a third wiring formed between the first wiring and the second wiring, the third wiring elongating in the first direction and being coupled to each of gates of the plurality of vertical transistors;
- and
- an external terminal receiving a clock enable signal, wherein the third wiring is configured to receive a control signal of which logic level is controlled responsive to the clock enable signal.
4 more elements
An apparatus, comprising:
- a substrate;
- a first wiring supplied with a power voltage, the first wiring being formed over the substrate and elongating in a first direction;
- a second wiring formed between the substrate and the first wiring with vertically overlapping the first wiring, the second wiring elongating in the first direction:
- a plurality of transistors vertically coupled between the first wiring and the second wiring;
- a third wiring between the first wiring and the second wiring;
- a fourth wiring between the third wiring and the second wiring;
- and
- a plurality of additional transistors each coupled between a corresponding one of the plurality of transistors and the second wiring;
- wherein the third wiring elongates in the first direction and coupled to each of gates of the plurality of transistors and
- wherein the fourth wiring elongates in the first direction and coupled to each of gates of the plurality of additional transistors.
7 more elements
An apparatus, comprising:
- a plurality of circuit blocks, each circuit block including circuits;
- a first conductive structure configured to be provided a supply voltage;
- a second conductive structure configured to provide power to the circuits of the plurality of circuit blocks;
- a third conductive structure configured to be provided a second supply voltage;
- a fourth conductive structure configured to provide power to the circuits of the plurality of circuit blocks;
- a plurality of vertical transistors disposed between the first and second conductive structures and configured to provide power from the first conductive structure to the second conductive structure when activated, each of the plurality of vertical transistors including a respective gate included in a gate electrode disposed between the first and second conductive structures;
- and
- a second plurality of vertical transistors disposed between the third and fourth conductive structures and configured to provide power from the third conductive structure to the fourth conductive structure when activated, each of the second plurality of vertical transistors including a respective gate included in a second gate electrode disposed between the third and fourth conductive structures.
5 more elements
An apparatus, comprising:
- a plurality of circuit blocks, each circuit block including circuits;
- a first conductive structure configured to be provided a supply voltage;
- a second conductive structure configured to provide power to the circuits of the plurality of circuit blocks;
- and
- a plurality of pairs of vertical transistors disposed between the first and second conductive structures, each of the pairs of vertical transistors including stacked vertical transistors, the plurality of pairs of vertical transistors configured to provide power from the first conductive structure to the second conductive structure when activated, each of the plurality of pairs of vertical transistors including a first gate included in a first gate electrode disposed between the first and second conductive structures and further including a second gate included in a second gate electrode disposed between the first gate electrode and the second conductive structure.
2 more elements
Dependencies are inferred from the claim text.