Method of fabricating a three dimensional electronic structure
AssigneeNewSouth Innovations Pty Limited
InventorsJoris Gerhard Keizer, Matthias Koch, Michelle Yvonne Simmons
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Abstract
The present disclosure provides methods for fabricating multi-layered electronic architectures in silicon and/or germanium. In particular the disclosure provides an advanced marker design and a methodology for aligning devices on multiple layers of a multi-layered electronic architecture. The disclosure also provides a process for growing a semiconductor material with high quality surfaces.
Claims19
An alignment marker for aligning electronic devices arranged on different planes of a multi-layered semiconductor architecture, the marker having a trenched structure comprising:
- a central region arranged to host at least a portion of an electronic device, wherein the central region is located at a bottom of the trenched structure;
- and
- a plurality of elongate regions radially extending from the central region, the plurality of elongate regions being arranged to host a plurality of conductive electrodes for control of the electronic device,
- wherein the trenched structure is arranged in a manner such that, when a layer of semiconductor material is grown onto the marker, a further trenched structure is replicated on a surface of the grown layer of semiconductor material.
A method for aligning electronic elements on different planar surfaces of a multi-layered architecture with respect to each other, the method comprising the steps of:
- providing a first planar surface of a semiconductor material comprising at least one marker in accordance with any one of the preceding claims and a first electronic element formed on the bottom of the trenched structure of the marker;
- imaging the at least one marker with the electronic element;
- determining the position of a reference point on the marker by using image data;
- determining an offset between the reference point and the electronic element;
- growing a further layer of the semiconductor material on the first planar surface in a manner such that the at least one marker is reproduced on a second planar surface;
- the second planar surface being a planar surface of the grown layer of the semiconductor material;
- and
- forming a second electronic element in the reproduced marker whereby the position of the second electronic element in the reproduced marker is based on the position of the reference point and offset of the first electronic element.
Dependencies are inferred from the claim text.