Integrating metal-insulator-metal capacitors with air gap process flow

A method, comprising:

• forming an interlayer dielectric layer of a back-end-of-line structure on a substrate;
• forming metal lines in the interlayer dielectric layer, wherein the metal lines comprise a first pattern of metal lines and a second pattern of metal lines, wherein the first pattern of metal lines are commonly connected to each other to form a first capacitor electrode;
• etching the interlayer dielectric layer to form spaces between the metal lines of the first pattern of metal lines, and to form spaces between the metal lines of the second pattern of metal lines;
• forming a capping layer over the interlayer dielectric layer to cover the metal lines in the interlayer dielectric layer and to form air gaps in the spaces between the metal lines of the first pattern of metal lines, and in the spaces between the metal lines of the second pattern of metal lines;
• patterning the capping layer to remove a portion of the capping layer that covers at least a portion of the first pattern of metal lines and expose the first pattern of metal lines and the spaces between the metal lines of the exposed portion of the first pattern of metal lines;
• depositing a conformal layer of insulating material over exposed surfaces of the metal lines of the exposed portion of the first pattern of metal lines to form a capacitor insulating layer;
• and
• depositing a layer of metallic material over the conformal layer of insulating material to fill the exposed spaces between the metal lines of the exposed portion of the first pattern of metal lines with the metallic material and to form a metallic layer over the exposed portion of the first pattern of metal lines, wherein the metallic material filled in the spaces and the metallic layer formed over the exposed portion of the first pattern of metal lines collectively form a second capacitor electrode.