Semiconductor device and manufacturing method thereof

A semiconductor device comprising:

• an integrated circuit comprising a first circuit and a second circuit that are formed in a substrate, wherein a first portion of the substrate defines a body portion of a transistor of the first circuit;
• and
• a guard ring disposed around the first circuit and separating the first circuit and the second circuit, wherein the entire guard ring is above the substrate and comprises:
• an outer ring disposed around the first circuit and having a first gap;
• an inner ring disposed between the outer ring and the first circuit, separated from the outer ring, and having a second gap;
• and
• two connectors separated from each other and respectively connecting the outer ring and the inner ring end-to-end to form a continuously loop with the outer ring and the inner ring, wherein:
• the outer ring, the inner ring, and the two connectors together form an enclosed region,
• the enclosed region separates the first circuit and the second circuit,
• at least one of the outer ring, the inner ring, or at least one of the two connectors are in contact with a second portion of the substrate, and
• the second portion of the substrate has a same composition as the first portion of the substrate.

A semiconductor device comprising:

• an integrated circuit comprising an analog circuit and a digital circuit, wherein at least one of the analog circuit or the digital circuit comprises:
• a first metal layer and a second metal layer over the first metal layer;
• and
• a via interconnecting the first metal layer and the second metal layer;
• a guard ring disposed around the analog circuit, at least a portion of the guard ring present between the analog circuit and the digital circuit, wherein the guard ring comprises:
• an inner ring disposed around the analog circuit, wherein the inner ring terminates at a first end and a second end;
• an outer ring disposed around the inner ring and spaced from the inner ring, wherein the outer ring terminates at a third end and a fourth end;
• and
• two connectors spaced from each other, wherein:
• one of the two connectors is connected to the first end of the inner ring and the third end of the outer ring,
• another one of the two connectors is connected to the second end of the inner ring and the fourth end of the outer ring,
• the outer ring, the inner ring, and the two connectors together form an enclosed region,
• the enclosed region separates the analog circuit and the digital circuit, and
• at least one of the outer ring or the inner ring comprises:
• a third metal layer and a fourth metal layer over the third metal layer;
• and
• a plurality of vias spaced apart from each other, in a same layer, and interconnecting the third metal layer and the fourth metal layer;
• and
• a passivation layer in contact with a top surface of the second metal layer and a top surface of the fourth metal layer.