Semiconductor device
AssigneeSynaptics Japan GK
InventorMasatoshi Taya
Life of this patent
Estimating the term…
Abstract
Provided is a semiconductor device including an active region defined by a separation region on a main surface of a semiconductor substrate, and a field effect transistor formed in the active region. A boundary portion, over which a gate electrode pattern strides, is disposed in a boundary between the active region and the separation region and is configured such that a length of one side, in a direction of a gate length of the field effect transistor formed in the active region, becomes larger than the gate length and does not come into contact with at least one of a pair of source and drain regions of the field effect transistor.
Claims14
A semiconductor device, comprising:
- an active region defined by a separation region on a main surface of a semiconductor substrate;
- and
- a field effect transistor formed in the active region,
- wherein a boundary portion, which a gate electrode pattern overlaps, is disposed in a boundary between the active region and the separation region, the field effect transistor including source and drain regions and a channel region interposed inside the boundary portion in a direction of a gate width and a direction of a gate length, a separation portion being part of the active region and separating the source and drain regions from the boundary portion in the direction of the gate width and the direction of the gate length, wherein the gate electrode pattern partially overlaps the separation region, and is adjacent to but does not overlap the source and drain regions, and wherein a gate oxide film partially underlies the gate electrode pattern and is adjacent to but not overlying the separation region.
A semiconductor device, comprising:
- an active region defined by a separation region on a main surface of a semiconductor substrate;
- and
- a field effect transistor formed in the active region,
- wherein a boundary portion, over which a gate electrode pattern strides, is disposed in a boundary between the active region and the separation region, the field effect transistor including source and drain regions and a channel region interposed inside the boundary portion at least in a direction of a gate width, a separation portion separating the source and drain regions from the boundary portion,
- wherein the boundary portion over which the gate electrode pattern strides comes into contact with both of a pair of source and drain regions of the field effect transistor formed in the active region, one source and drain region has the separation portion formed between the boundary portion and the region, and a length of the boundary portion from a position at which the boundary portion and the one source and drain region come into contact with each other to a position at which the boundary portion comes into contact with the other source and drain region through the separation portion is larger than a gate length of the field effect transistor,
- wherein a length of the one source and drain region in the direction of the gate width becomes smaller than a length of the other source and drain region in the direction of the gate width, and
- the boundary portion covered with the gate electrode pattern has the one source and drain region and the channel region of the field effect transistor, formed in the active region, interposed therein in the direction of the gate width.
A semiconductor device, comprising:
- an active region defined by a separation region on a main surface of a semiconductor substrate;
- and
- a field effect transistor formed in the active region,
- wherein a boundary portion, which a gate electrode pattern overlaps, is disposed in a boundary between the active region and the separation region and is configured such that a length of one side, in a direction of a gate length of the field effect transistor formed in the active region, becomes larger than the gate length, and does not come into contact with at least one of a pair of source and drain regions of the field effect transistor,
- wherein a region between the boundary portion and the source and drain regions is part of the active region,
- wherein a gate oxide film partially underlies the gate electrode pattern and is adjacent to but not overlying the separation region, and
- wherein the gate electrode pattern is adjacent to but does not overlap the source and drain regions.
A semiconductor device, comprising:
- an active region defined by a separation region on a main surface of a semiconductor substrate;
- and
- a field effect transistor formed in the active region,
- wherein a boundary portion, over which a gate electrode pattern strides, is disposed in a boundary between the active region and the separation region and comes into contact with both of a pair of source and drain regions of the field effect transistor formed in the active region, a non-contact length of the boundary portion, not in contact with the source and drain regions and between a first part of the boundary portion that comes into contact with one of the source and drain regions and a second part of the boundary portion that comes into contact with the other source and drain region, becomes larger than a gate length of the field effect transistor,
- wherein a length of the one source and drain region in a direction of a gate width becomes smaller than a length of the other source and drain region in the direction of the gate width, and
- the one source and drain region comes into contact with the boundary portion through a separation portion which is separated from the boundary portion.
Dependencies are inferred from the claim text.