Memory device shared by two or more processors and system including the same

A memory controller for a shared memory system, the memory controller configured to:

• partition a memory device into a plurality of memory regions, each of the plurality of memory regions allocated to at least one of a first processor and a second processor, the first processor electrically connected to the memory controller via a first local bus, and the second processor electrically connected to the memory controller via a second local bus;
• receive a command instruction from one of the first processor or the second processor;
• determine a memory region of the plurality of memory regions associated with the received command instructions using a mapping table;
• access the determined memory region in accordance with the received command instruction;
• and
• transmit results of the access to the at least one of the first processor and the second processor issuing the received command instruction, wherein
• the received command instruction is a refresh operation command;
• and
• the controller is further configured to,
• partition the memory device by setting a size of at least one of the memory regions based on an instruction received from one of the first processor or the second processor, and
• cause the memory device to perform the refresh operation on the memory regions of the plurality of memory regions not indicated as being masked, based on masking information indicating a memory region of the plurality of memory regions to mask.