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US 10,373,552 B2Granted
Display device having a multilayer wiring structure including a wiring in a lower electrode layer
AssigneeSony Corporation
InventorsJunichi Yamashita, Katsuhide Uchino
Life of this patent
Estimating the term…
Abstract
Any one of a write scanning line, a power source supply line, and a video signal line is structured as a subsidiary wiring disposed in the same layer as that having a lower electrode disposed therein. The subsidiary wiring is used in the power source supply line through which a power source drive pulse to be pulse-driven is transmitted, or other wirings (such as the write scanning line and the video signal line).
Claims11
A display device comprising:
- a signal line in a first layer, the signal line extends in a signal line direction;
- a scanning line in a second layer that is different from the first layer, the scanning line extends in a direction that is orthogonal to the signal line direction;
- an electro-optic element that includes an organic layer between an upper electrode and a lower electrode, the lower electrode is in a third layer;
- a transistor layer between a first wiring layer and an insulating layer, the insulating layer is between the lower electrode and the transistor layer;
- a transistor that is switchable between electrically connecting wiring to a supply line and electrically disconnecting the wiring from the supply line, the wiring electrically connects the lower electrode to the transistor;
- and
- a plate of a storage capacitor in the first layer, the plate of the storage capacitor is a gate electrode of a drive transistor,
- wherein the electro-optic element covers the wiring in a top plan view of the display device,
- wherein a channel region of the transistor layer is between a drain region of the transistor layer and a source region of the transistor layer, the wiring electrically connects the source region to the lower electrode, and
- wherein the channel region is another plate of the storage capacitor.
7 more elements
A display device comprising:
- an electro-optic element that covers interlayer wiring in a top plan view of the display device, the electro-optic element includes an organic layer between an upper electrode and a lower electrode;
- a transistor layer between a first wiring layer and an insulating layer, the insulating layer is between the lower electrode and the transistor layer;
- and
- a plate of a storage capacitor in the first wiring layer,
- wherein a channel region of the transistor layer is between a drain region of the transistor layer and a source region of the transistor layer, the interlayer wiring electrically connects the source region to the lower electrode, and
- wherein the plate of the storage capacitor is a gate electrode of a drive transistor, the channel region is another plate of the storage capacitor.
3 more elements
Dependencies are inferred from the claim text.