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US 10,372,863 B2Granted
Tool for modular circuit board design
AssigneeArch Systems Inc.
InventorsTimothy Matthew Burke, Christopher Ling
Life of this patent
Estimating the term…
Abstract
A system for dynamic circuit board design, preferably including a library of modular circuits and a merge tool. A method for merging modular circuitry into a unified electronics module, preferably including: receiving a circuit board layout, the circuit board layout preferably including a set of modular circuits arranged on a virtual carrier board; converting the circuit board layout into a virtual circuit representation; applying transformations to the virtual circuit representation; and generating a unified circuit board design based on the transformed virtual circuit representation.
Claims23
A method for electronic circuit generation, comprising:
- receiving a first hierarchical circuit representation comprising a first plurality of electronic component nodes associated with a first component layer and a first plurality of electrical conductor nodes associated with a first metal layer;
- receiving a second hierarchical circuit representation comprising a second plurality of electronic component nodes associated with a second component layer and a second plurality of electrical conductor nodes associated with a second metal layer;
- and
- generating a unified hierarchical circuit representation comprising:
- a first module comprising a first module root node, a second module comprising a second module root node, a unified component layer, and a unified metal layer;
- wherein generating the unified hierarchical circuit representation comprises:
- for each electronic component node of the first plurality of electronic component nodes:
- generating a respective electronic component node associated with the unified component layer, wherein the first module root node is an ancestor node of the respective electronic component node;
- for each electrical conductor node of the first plurality of electrical conductor nodes:
- generating a respective electrical conductor node associated with the unified metal layer, wherein the first module root node is an ancestor node of the respective electrical conductor node;
- for each electronic component node of the second plurality of electronic component nodes:
- generating a respective electronic component node associated with the unified component layer, wherein the second module root node is an ancestor node of the respective electronic component node;
- and
- for each electrical conductor node of the second plurality of electrical conductor nodes:
- generating a respective electrical conductor node associated with the unified metal layer, wherein the second module root node is an ancestor node of the respective electrical conductor node.
12 more elements
A method for electronic circuit generation, comprising:
- receiving a first circuit representation comprising a first plurality of electronic component objects and a first plurality of electrical conductor objects;
- receiving a second circuit representation comprising a second plurality of electronic component objects and a second plurality of electrical conductor objects;
- and
- generating a unified hierarchical circuit representation comprising:
- a first module and a second module;
- wherein generating the unified hierarchical circuit representation comprises:
- for each electronic component object of the first plurality of electronic component objects:
- generating a respective electronic component object of the unified hierarchical circuit representation, the respective electronic component object associated with the first module;
- for each electrical conductor object of the first plurality of electrical conductor objects:
- generating a respective electrical conductor object of the unified hierarchical circuit representation, the respective electrical conductor object associated with the first module;
- for each electronic component object of the second plurality of electronic component objects:
- generating a respective electronic component object of the unified hierarchical circuit representation, the respective electronic component object associated with the second module;
- and
- for each electrical conductor object of the second plurality of electrical conductor objects:
- generating a respective electrical conductor object of the unified hierarchical circuit representation, the respective electrical conductor object associated with the second module.
12 more elements
Dependencies are inferred from the claim text.