Implementing enhanced diagnostics with intelligent pattern combination in automatic test pattern generation (ATPG)

A computer test system and circuit for implementing enhanced diagnostics of a design under test with intelligent pattern combination in automatic test pattern generation (ATPG) comprising:

• a processor;
• a test control program, said processor using said test control program for performing the steps of:
• selecting a random fault in the design;
• generating a test pattern and applying the test pattern to the design under test to test the selected random fault;
• re-simulating the test pattern to determine faults covered by the applied test pattern;
• selecting a fault based upon the applied test pattern to the design under test for generating a new test pattern for next iterations of test pattern generation including identifying a contradiction, where as values at one of a current control point and a current observe point change causes targeting the selected fault to be not fully possible with the applied pattern, and repeating with selecting another fault based upon the applied test pattern for generating the new test pattern;
• and
• performing diagnostics of the design under test using the generated new test pattern for next iterations of test pattern generation with intelligent pattern combination in automatic test pattern generation (ATPG).