US 10,372,650 B2Granted

Cross-over and bypass configurations for high-speed data transmission

AssigneeApple Inc.

InventorEric W. Anderson

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Abstract

Circuits, methods, and apparatus that may improve networking techniques for transferring data among various electronic devices. One example may provide sharing data among various devices by daisy-chaining devices together. That is, several devices may be connected to each other through a series of cables to form a chain of devices. In this physical configuration, data may be shared among multiple devices using a series of single-hop virtual tunnels. Alternatively, a number of tunnels may be formed by a host device, each having a target device in the daisy chain. Each tunnel may originate at the host device and terminate at their target device. Each tunnel may bypass devices between the host device and the tunnel's target device. These two techniques may also be combined. Another example may provide a method of simplifying the routing of high-speed data signals through a network topology.

Claims19

Dependent claims

A method of transferring data among a plurality of electronic devices, the method comprising:

receiving first data at a first routing circuit of a first electronic device;
receiving second data at a second routing circuit of the first electronic device;
providing the first data using the first routing circuit to one of a first electronic circuit of the first electronic device, a second set of pins of a first connector of the first electronic device, or a second set of pins of a second connector of the first electronic device;
and
providing the second data using the second routing circuit to one of a first set of pins of the first connector of the first electronic device or a first set of pins of the second connector of the first electronic device,
wherein the first connector and the second connector of the first electronic device are the same type of connector, each having corresponding pins in corresponding positions for a first lane and each having corresponding pins in corresponding positions for a second lane, the first set of pins of the first connector for a first lane of the first connector, the first set of pins of the second connector for a first lane of the second connector, the second set of pins of the first connector for a second lane of the first connector, and the second set of pins of the second connector for a second lane of the second connector, and
wherein the first routing circuit of the first electronic device provides the first data to a second set of pins of a first connector of the first electronic device using an input/output port.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application: 14/629,358Filed 23 Feb 2015 · division
Priority: 23 Feb 2011
Published: US 2015/0212966 A130 Jul 2015
Granted: 6 Aug 2019
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

G06F 13/4027
Coupling between buses: using bus bridges
G06F 13/385
Using universal interface adapter: for adaptation of a particular data processing system to different peripheral devices
G06F 13/4022
Coupling between buses: using switching circuits, e.g. switching matrix, connection or expansion network
G06F 13/4221
On a parallel bus: being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus

Family

Application61/446,027Us provisional application · filed 23 Feb 2011
Application13/403,182Parent of this division · filed 23 Feb 2012
US 2015/0212966 A1Pre-grant publication · published 30 Jul 2015
US 8,966,134 B2Parent of this division
US 2012/0215950 A1Published application
US 10,372,650 B2This patent

From the US filing history. Foreign family members aren’t listed.

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