Programmable adapter between slow peripherals and network on-chip interfaces

An interface adapter for adapting communication between a low-speed interface and a high- speed interface, the interface adapter comprising:

• a microcontroller comprising a first input terminal, a second input terminal, a first bidirectional terminal, a second bidirectional terminal, and a third bidirectional terminal;
• a high-speed interface module comprising an output terminal, a first bidirectional terminal, a second bidirectional terminal, and a third bidirectional terminal, wherein the output terminal couples to the second input terminal of the microcontroller;
• a low-speed interface module comprising an output terminal coupled to the first input terminal of the microcontroller, a first bi-directional terminal, a second bidirectional terminal coupled to the third bidirectional terminal of the microcontroller and the second bidirectional terminal of the high-speed interface module, and a third bidirectional terminal coupled to the third bidirectional terminal of the high-speed interface module;
• and
• an instruction memory comprising a bidirectional output terminal coupled to the second bidirectional terminal of the microcontroller.

A non-transitory computer readable storage medium to store a computer program configured to execute a method for adapting communication between a low-speed interface and a high-speed interface, the method comprising:

• retrieving, by a microcontroller and via a memory bus, configuration instructions in response to a power-up of the microcontroller, the configuration instructions associated with a low-speed communication protocol;
• sending, by the microcontroller and via an address/data bus, the configuration instructions to a low-speed interface module causing the low-speed interface module to configure an interface of the low-speed interface module based on the configuration instructions;
• entering, by the microcontroller, a low-power mode;
• receiving, by the interface of the low-speed interface module, data associated with the low-speed communication protocol;
• changing, by the low-speed interface module and in response to receiving the data, a state of an interrupt signal causing the microcontroller to wake from the low-power mode;
• retrieving, by the microcontroller via an instruction bus, mapping instructions associated with a high-speed communication protocol;
• and
• sending, by the microcontroller and via the address/data bus, the mapping instructions to the low-speed interface module, causing the low-speed interface module to convert the data associated with the low-speed communication protocol to data associated with the high-speed communication protocol.

An interface adapter for adapting communication between two interfaces, the interface adapter comprising:

• a microcontroller comprising a first input terminal, a second input terminal, a first bidirectional terminal, a second bidirectional terminal, and a third bidirectional terminal;
• a transmitting interface module comprising an output terminal, a first bidirectional terminal, a second bidirectional terminal, and a third bidirectional terminal, wherein the output terminal couples to the second input terminal of the microcontroller;
• a receiving interface module comprising an output terminal coupled to the first input terminal of the microcontroller, a first bi-directional terminal, a second bidirectional terminal coupled to the third bidirectional terminal of the microcontroller and the second bidirectional terminal of the transmitting interface module, and a third bidirectional terminal coupled to the third bidirectional terminal of the transmitting interface module;
• and
• an instruction memory comprising a bidirectional output terminal coupled to the second bidirectional terminal of the microcontroller.