Memory system

A memory system connectable to a host, comprising:

• a nonvolatile first memory storing translation information, the translation information associating a logical address and a physical address, the logical address indicating a location in an address space provided to the host, the physical address indicating a physical location in the first memory;
• a volatile second memory storing location information, the location information associating a logical address and a physical location where the translation information is stored;
• and
• a controller circuit configured to write a log into the first memory when the translation information is written into the first memory, the log being a change in the location information, wherein,
• upon booting, the controller circuit loads a first memory image and a second memory image to the second memory, the first memory image being a memory image of first location information and being saved into the first memory at a first timing, the second memory image being a memory image of second location information and being saved into the first memory at a second timing different from the first timing, the first location information being a portion of the location information and associating a logical address belonging to a first address space with a physical location of a portion of the translation information, the second location information being a portion of the location information and associating a logical address belonging to a second address space with a physical location of another portion of the translation information, the first address space and the second address space being different portions of the address space from each other,
• in a case where the log is a change in the first location information and a change after the first timing, reflects the log to the first memory image loaded to the second memory, and
• in a case where the log is a change in the second location information and a change after the second timing, reflects the log to the second memory image loaded to the second memory,
• wherein the controller circuit writes the translation information into the first memory between the first timing and the second timing, and updates the location information in a case where the translation information is written into the first memory,
• wherein
• the controller circuit repeats, for plural times, processes of saving the first memory image in the first memory at a third timing and saving the second memory image in the first memory at a fourth timing, which is a timing after the third timing,
• the first timing is a last timing of one or more of the third timings, and
• the second timing is a last timing of one or more of the fourth timings.

A method for controlling a memory system comprising a nonvolatile first memory and a volatile second memory, the method comprising:

• storing, into the first memory translation information, the translation information associating a logical address and a physical address, the logical address indicating a location in an address space provided to a host, the physical address indicating a physical location in the first memory;
• storing, into the second memory, location information, the location information associating a logical address and a location where the translation information is stored in the first memory;
• saving a first memory image into the first memory at a first timing, the first memory image being a part of a memory image of the location information and corresponding to a first portion of the address space;
• saving a second memory image into the first memory at a second timing different from the first timing, the second memory image being another part, different from the part of the first memory image, of the memory image of the location information and corresponding to a second portion, different from the first portion, of the address space, wherein
• the address space includes a first address space and a second address space,
• the first address space includes the first portion, and
• the second address space includes the second portion;
• writing the translation information into the first memory between the first timing and the second timing;
• updating the location information in a case where the translation information is written into the first memory;
• and
• repeating, for plural times, processes of saving the first memory image into the first memory at a third timing and saving the second memory image into the first memory at a fourth timing, which is a timing after the third timing, the first timing being a last timing of one or more of the third timings, the second timing being a last timing of one or more of the fourth timings.