Method of encoding data
AssigneeIntel Corporation
InventorsHuimin Chen, Andrew Martwick, Howard Heck, Robert Dunstan, Dennis Bell, Abdul Hawk Ismail
Life of this patent
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Abstract
Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.
Claims25
An electronic device, comprising:
- an encoder to establish a block header comprising an arrangement of bits, the block header defining at least two block header types, wherein a hamming distance between block header types is at least four;
- a transmitter to transmit the block header followed by a block payload, wherein a bit rate clock is embedded in a data stream that comprises the block header and the block payload, and the bit rate clock enables correction of errors in the block header without re-transmission of the block header and the block payload, and in response to a configuration of a single bit a scrambler is bypassed.
An electronic device, comprising:
- a receiver to receive line encoded data;
- a decoder to identify a block header comprising an arrangement of bits, the block header defining the content of a block payload, the block header defining two block header types, wherein a hamming distance between block header types is at least four;
- and
- a clock recovery circuit, wherein a recovered symbol clock is derived from a recovered bit rate clock resulting in two clock domains and the decoder provides the block header and the block payload to an elastic buffer that operates in the two clock domains, wherein the recovered symbol clock enables block header alignment and block header recovery including error detection and correction.
A method of encoding data, comprising:
- receiving a block payload at a physical layer to be transmitted via a data bus;
- establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four;
- and
- deriving a recovered symbol clock from a recovered bit rate clock resulting in two clock domains, wherein the block header and the block payload are received at an elastic buffer that operates in the two clock domains, wherein the recovered symbol clock enables block header alignment and block header recovery including error detection and correction.
A tangible, non-transitory, computer-readable medium comprising instructions to direct a processor to carry out operations, the operations comprising:
- receiving a block payload a physical layer transmitted via a data bus;
- and
- identifying a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four;
- and
- deriving a recovered symbol clock from a recovered bit rate clock resulting in two clock domains, wherein the block header and the block payload are received at an elastic buffer that operates in the two clock domains, wherein the recovered symbol clock enables block header alignment and block header recovery including error detection and correction.
Dependencies are inferred from the claim text.