Back to results
US 10,372,495 B2Granted
Circuits and methods providing thread assignment for a multi-core processor
AssigneeQUALCOMM Incorporated
InventorsAkash Kumar, Ankita
Life of this patent
Estimating the term…
Abstract
A system includes: a system on chip (SOC) having a plurality of cores; a first memory storing operating parameters for each of the cores; and a second memory storing historical use data for an application, wherein processing threads of the application are assigned to one or more of the plurality of cores based, at least in part, on the operating parameters for each of the cores and the historical use data.
Claims30
A system comprising:
- a system on chip (SOC) having a plurality of cores;
- a first memory storing operating parameters for each of the cores;
- and
- a second memory storing historical use data for an application;
- wherein:
- processing threads of the application are assigned to one or more of the plurality of cores based, at least in part, on the operating parameters for each of the cores and the historical use data;
- the operating parameters for each of the cores include a minimum operating voltage for each of the cores;
- and
- the processing threads of the application are assigned to one or more of the plurality of cores based, at least in part, by selecting a first core having a minimum operating voltage above an application minimum operating voltage of the historical use data and below a minimum operating voltage associated with a second core.
6 more elements
A method comprising:
- storing in a first memory operating parameters for each of a plurality of cores of a system on chip (SOC);
- storing in a second memory historical use data for an application;
- accessing the first memory and the second memory in response to operation of the application;
- and
- assigning a plurality of processing threads of the application to one or more of the plurality of cores based, at least in part, on operating parameters of each of the cores and on the historical use data of the application, wherein:
- the operating parameters for each of the plurality of cores include a minimum operating voltage for each of the cores;
- and
- assigning the plurality of processing threads comprises selecting a first core having a minimum operating voltage above an application minimum operating voltage of the historical use data and below a minimum operating voltage associated with a second core of the plurality of cores.
5 more elements
A non-transitory machine-readable medium having stored thereon instructions for performing a method, the medium comprising machine executable code which when executed by at least one processor, causes the at least one processor to:
- store in a first memory operating parameters for each of a plurality of cores of a system on chip (SOC);
- store in a second memory historical use data for an application;
- access the first memory and the second memory in response to operation of the application;
- and
- assign a plurality of processing threads of the application to a first core of the plurality of cores based, at least in part, on operating parameters of the first core and on the historical use data of the application, wherein:
- the operating parameters for each of the plurality of cores include a minimum operating voltage for each of the cores and a minimum operating frequency for each of the cores;
- and
- assigning the plurality of processing threads comprises selecting the first core having a minimum operating voltage above an application minimum operating voltage of the historical use data and below a minimum operating voltage associated with a second core of the plurality of cores.
5 more elements
A wireless device comprising:
- a system on chip (SOC) having a plurality of cores;
- means for storing operating parameters for each of the cores;
- means for storing historical use data for an application;
- and
- means for assigning processing threads of the application to one or more of the plurality of cores based, at least in part, on the operating parameters for each of the cores and the historical use data, wherein:
- the operating parameters for each of the plurality of cores include a minimum operating voltage for each of the cores;
- and
- the processing threads of the application are assigned by the assigning means based, at least in part, by selecting a first core having a minimum operating voltage above an application minimum operating voltage of the historical use data and below a minimum operating voltage associated with a second core.
5 more elements
A method comprising:
- storing in a first memory operating parameters for each of a plurality of cores;
- storing in a second memory historical use data for an application;
- accessing the first memory and the second memory in response to operation of the application;
- and
- assigning a plurality of processing threads of the application to a first core of the plurality of cores based, at least in part, on operating parameters of the first core and on the historical use data of the application, wherein the historical use data includes a plurality of entries correlating each application with respective thermal gradient information.
2 more elements
A method comprising:
- storing in a first memory operating parameters for each of a plurality of cores;
- storing in a second memory historical use data for an application;
- accessing the first memory and the second memory in response to operation of the application;
- and
- assigning a plurality of processing threads of the application to a first core of the plurality of cores based, at least in part, on operating parameters of the first core and on the historical use data of the application, wherein the operating parameters include a plurality of entries correlating each of the cores with respective physical distances to a known hot spot.
2 more elements
Dependencies are inferred from the claim text.