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US 10,372,400 B2Granted
Video management for compute nodes
AssigneeHewlett Packard Enterprise Development LP
InventorsTheodore F. Emerson, David F. Heinrich, Kenneth T. Chin
Life of this patent
Estimating the term…
Abstract
An apparatus includes a plurality of compute nodes and a baseboard management controller that is shared by the plurality of compute nodes to manage video for the compute nodes. The baseboard management controller includes video controllers that are associated with the plurality of compute nodes and at least one resource that is shared by the video controllers.
Claims11
An apparatus comprising:
- a plurality of video controllers associated with a plurality of compute nodes and to provide first requests associated graphics rendering operations to a first memory address space shared in common by the video controllers;
- an address translator to receive the first requests and convert the first requests into second requests directed to a plurality of separate memory spaces such that each separate memory space is associated with a different video controller of the plurality of controllers;
- a memory controller to receive the second requests and generate memory cycles with a memory in response thereto;
- a refresh multiplexer to receive a set of time overlapping display refresh requests from a group of the video controllers, select one or more of the video controllers, provide data from a rendered frame video memory to the selected one or more video controllers, and provide substitute data to the one or more non-selected video controllers of the group,
- wherein the selected one or more video controllers comprise a first video controller and the non-selected one or more video controllers comprise a second video controller, the apparatus further comprising:
- a phase locked loop (PLL) to provide a first clock signal;
- a non-PLL based frequency divider to provide a second clock signal;
- and
- a clock selector to, in response to the selection of the first video controller, provide the first clock signal to the first video controller to clock the first video controller and, in response to the non-selection of the second video controller, provide the second clock signal to the second video controller to clock the second video controller.
6 more elements
An method comprising:
- at a plurality of video controllers associated with a plurality of compute nodes, providing first requests associated graphics rendering operations to a first memory address space shared in common by the video controllers;
- receiving, at an address translator, the first requests;
- converting, at the address translator, the first requests into second requests directed to a plurality of separate memory spaces such that each separate memory space is associated with a different video controller of the plurality of controllers;
- receiving, at a memory controller, the second requests;
- generating, by the memory controller, memory cycles with a memory in response thereto;
- receiving, at a refresh multiplexer, a set of time overlapping display refresh requests from a group of the video controllers,
- selecting, by the refresh multiplexer, one or more of the video controllers,
- providing, by the refresh multiplexer, data from a rendered frame video memory to the selected one or more video controllers, and
- providing substitute data to the one or more non-selected video controllers of the group,
- wherein the selected one or more video controllers comprise a first video controller and the non-selected one or more video controllers comprise a second video controller,
- providing a first clock signal by a phase locked loop (PLL);
- providing a second clock signal by a non-PLL based frequency divider;
- and
- in response to the selection of the first video controller, providing, by a clock selector, the first clock signal to the first video controller to clock the first video controller and, in response to the non-selection of the second video controller, provide the second clock signal to the second video controller to clock the second video controller.
11 more elements
Dependencies are inferred from the claim text.