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US 10,372,369 B2Granted
Apparatuses and methods for single level cell caching
AssigneeMicron Technology, Inc.
InventorDaniel Doyle
Life of this patent
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Abstract
Methods and apparatuses for single level cell caching are described. According to one example, a method includes receiving, at a memory device, a first set of data to be stored in a lower page of multilevel memory cells, storing the first set of data in a page of single level memory cells, storing the first set of data in the lower page of the multilevel memory cells, receiving, at the memory device, a second set of data to be stored in an upper page of the multilevel memory cells, and storing the second set of data directly in the upper page of the multilevel memory cells.
Claims14
A method comprising:
- receiving, at a control circuit, a first set of write data;
- determining whether the first set of write data is to be stored in a lower page or an upper page of a block of multilevel memory cells;
- responsive to determining that the first set of write data is to be stored in the lower page, storing the first set of write data in a page of a block of single level memory cells and the lower page of the block of multilevel memory cells;
- and
- responsive to determining that the first set of write data is to be stored in the upper page, storing the first set of write data directly in the upper page of the block of multilevel memory cells without storing the first set of write data in the page of the block of single level memory cells.
2 more elements
Dependencies are inferred from the claim text.