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US 10,372,342 B2Granted
Multi-level cell solid state device and method for transferring data between a host and the multi-level cell solid state device
AssigneeWestern Digital Technologies, Inc.
InventorsGautam Ashok Dusija, Mrinal Kochar, Matthew Davidson
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Abstract
Systems and methods for storing data in a multi-level cell (MLC) flash memory are disclosed. One such data storage system has a data path with cascaded data access performance, including multiple storage portions having different data access speeds. A cascaded data path enables flash memory data access that has a more graceful degradation instead of an abrupt decrease in performance during operation.
Claims18
A method of operating a solid state device, the method comprising:
- storing cold data in a first portion of a non-volatile memory (NVM) using a first number of bits per cell;
- storing warm data in a second portion of the NVM using a second number of bits per cell, less than the first number of bits, wherein the warm data has a higher access frequency than the cold data;
- storing hot data in a single level cell (SLC) buffer of the NVM, wherein the hot data has a higher access frequency than the warm data;
- receiving a command from a host to transfer data between the host and the NVM;
- transferring data between the host and the NVM via at least one of the SLC buffer of the NVM or the second portion of the NVM, based on the command;
- and
- dynamically adjusting a size of the second portion of the NVM, comprising:
- determining free space in the second portion of the NVM;
- and
- if the free space is less than a predetermined threshold, increasing the size of the second portion of the NVM for storing the warm data.
7 more elements
A solid state device (SSD) comprising:
- a non-volatile memory (NVM) comprising a single level cell (SLC) buffer, and
- a controller operatively coupled to the NVM;
- wherein the controller is configured to:
- store cold data in a first portion of NVM using a first number of bits per cell;
- store warm data in a second portion of the NVM using a second number of bits per cell, less than the first number of bits, wherein the warm data has a higher access frequency than the cold data;
- store hot data in the SLC buffer of the NVM, wherein the hot data has a higher access frequency than the warm data;
- receive a command from a host to transfer data between the host and the NVM;
- transfer data between the host and the NVM via at least one of the SLC buffer or the second portion of the NVM, based on the command;
- and
- dynamically adjust a size of the second portion of the NVM, comprising:
- determining free space in the second portion of the NVM;
- and
- if the free space is less than a predetermined threshold, increasing the size of the second portion of the NVM for storing the warm data.
10 more elements
A solid state device (SSD) comprising:
- means for accessing a non-volatile memory (NVM) comprising a first portion configured to store cold data using a first number of bits per cell, a second portion configured to store warm data using a second number of bits per cell less than the first number of bits, and a single level cell (SLC) buffer configured to store hot data, wherein the warm data has a higher access frequency than the cold data, and the hot data has a higher access frequency than the warm data;
- means for receiving a command from a host to transfer data between the host and the NVM;
- means for transferring data between the host and the NVM via at least one of the SLC buffer of the NVM or the second portion of the NVM, based on the command;
- and
- means for dynamically adjusting a size of the second portion of the NVM, comprising:
- determining free space in the second portion of the NVM;
- and
- if the free space is less than a predetermined threshold, increasing the size of the second portion of the NVM for storing the warm data.
5 more elements
Dependencies are inferred from the claim text.