Non-volatile storage device system with page based remapping

A method of operating non-volatile memory, comprising:

• receiving one or more commands to move data from source logical addresses to destination logical addresses;
• reading entries for the source logical addresses in a set of one or more logical to physical mappings that identify physical addresses in the non-volatile memory that are storing data for the source logical addresses in response to the one or more commands;
• writing the physical addresses into entries for the destination logical addresses in the set of one or more logical to physical mappings;
• marking the entries for the source logical addresses in the set of one or more logical to physical mappings as being invalid;
• and
• updating entries for the physical addresses in physical to logical mappings to replace source logical addresses with destination logical addresses by updating physical to logical mappings in Controller RAM for open blocks and rewriting physical to logical mappings in the non-volatile memory for closed blocks;
• the writing the physical addresses, the marking the entries and the updating entries are performed without physically moving the data represented by the source logical addresses and the destination logical addresses.

A method of operating a non-volatile memory system comprising a controller, RAM connected to the controller and non-volatile memory connected to the controller, the RAM is volatile memory, comprising:

• receiving first data and a command to write the first data to a first logical address;
• writing a first physical address to an entry for the first logical address in a logical to physical mapping structure;
• writing the first data to the first physical address of a first open block of the non-volatile memory;
• writing the first logical address to an entry for the first physical address in a physical to logical mapping structure stored in RAM;
• receiving second data and a command to write the second data to a second logical address;
• writing a second physical address to an entry for the second logical address in the logical to physical mapping structure;
• writing the second data to the first open block at the second physical address, the writing of the second data causes the first open block to become closed;
• writing the second logical address to an entry for the second physical address in the first physical to logical mapping structure;
• in response to the first open block becoming closed, writing the first physical to logical mapping structure to the non-volatile memory;
• receiving a command to move the second data from the second logical address to a third logical address;
• and
• moving the second data from the second logical address to the third logical address without moving the second data between memory cells by updating the logical to physical mapping and updating the physical to logical mapping.

An apparatus, comprising:

• a local volatile memory;
• a host interface configured to communicate with a host;
• a memory interface configured to communicate with non-volatile memory;
• and
• one or more processors in communication with the local volatile memory as well as the host interface and the memory interface, the one or more processors configured to address portions of the non-volatile memory via the memory interface using physical addresses, the one or more processors configured to address portions of host data via the host interface using logical addresses, the one or more processors configured to maintain logical to physical mappings and physical to logical mappings for the logical addresses and the physical addresses, the one or more processors configured to move data from a first logical address to a second logical address by updating logical to physical mappings and physical to logical mappings without instructing the non-volatile memory to move the data between physical locations, the one or more processors are configured to update physical to logical mappings by updating entries in physical to logical mappings stored in the local volatile memory for open blocks of the non-volatile memory and updating entries in physical to logical mappings stored in the non-volatile memory via the memory interface for closed blocks of the non-volatile memory.