Inter-chip time synchronization

A method comprising:

• capturing, by a first circuit having a first clock, a first timestamp responsive to receiving a sampling signal from a second circuit;
• receiving, by the first circuit from the second circuit, a second timestamp captured by the second circuit from a second clock, the second timestamp having been captured when the sampling signal was transmitted to the first circuit;
• generating, by the first circuit, a first conversion parameter for converting from the second clock to the first clock;
• storing, by the first circuit, the first conversion parameter;
• receiving, by the first circuit, a packet from the second circuit, the packet including a received timestamp captured from the second clock;
• and
• converting, by the first circuit, the received timestamp based at least in part on the first conversion parameter.

A system, comprising:

• a first circuit comprising a first clock, the first circuit being communicatively coupled to a second circuit, wherein the first circuit is configured to:
• receive a plurality of sampling signals from the second circuit;
• capture a plurality of first timestamps from the first clock, each respective first timestamp of the plurality of first timestamps being captured upon receipt of a respective one of the plurality of sampling signals;
• receive a plurality of second timestamps from the second circuit, each respective second timestamp of the plurality of second timestamps having been captured by the second circuit from a second clock upon transmission of a respective one of the plurality of sampling signals to the first circuit;
• generate a first conversion parameter for converting from the second clock of the second circuit to the first clock of the first circuit based at least in part on the plurality of first timestamps and the plurality of second timestamps;
• and
• store the first conversion parameter.

An apparatus comprising:

• a first circuit comprising a first clock, the first circuit being communicatively coupled to a second circuit via a sampling channel and a data channel, and the first circuit configured to:
• capture a first timestamp responsive to receipt of a sampling signal from a second circuit over the sampling channel;
• receive, from the second circuit over the data channel, a second timestamp captured by the second circuit from a second clock, the second timestamp having been captured when the sampling signal was transmitted to the first circuit;
• generate a first conversion parameter for converting from the second clock to the first clock;
• and
• store the first conversion parameter.

A non-transitory computer readable medium storing a computer product comprising code to perform one or more operations, the code comprising:

• code to capture, by a first circuit having a first clock, a first timestamp responsive to receipt of a sampling signal from a second circuit;
• code to receive, by the first circuit from the second circuit, a second timestamp captured by the second circuit from a second clock, the second timestamp having been captured when the sampling signal was transmitted to the first circuit;
• code to generate, by the first circuit, a first conversion parameter for converting from the second clock to the first clock;
• code to transmit, by the first circuit to the second circuit, a packet for transmission over a network;
• code to receive, by the first circuit from the second circuit, a transmission complete packet that includes a transmitted timestamp captured by the second circuit from the second clock when the packet was transmitted over the network by the second circuit;
• and
• code to convert, by the first circuit, the transmitted timestamp based at least in part on the first conversion parameter.