System and method for transmit power control with secondary uplink pilot channel

A user equipment (UE) configured to perform transmit power control (TPC), the UE comprising:

• a non-transitory memory storage comprising instructions;
• and
• one or more processors in communication with the memory storage, wherein the one or more processors execute the instructions to:
• determine a transmit power of an uplink dedicated physical control channel (DPCCH) in accordance with a first combination of TPC fields from at least one of a first downlink fractional control channel from a serving high-speed downlink shared channel (HS-DSCH) cell, a second downlink fractional control channel from the serving HS-DSCH cell, or a downlink fractional control channel from a non-serving HS-DSCH cell;
• receive signaling indicating a switch in how the transmit power of the uplink DPCCH is determined;
• and
• determine the transmit power of the uplink DPCCH in accordance with a second combination of the TPC fields from at least one of the first downlink fractional control channel from the serving HS-DSCH cell, the second downlink fractional control channel from the serving HS-DSCH cell, or the downlink fractional control channel from the non-serving HS-DSCH cell.

A user equipment (UE) configured to estimate channel quality, the UE comprising:

• a non-transitory memory storage comprising instructions;
• and
• one or more processors in communication with the memory storage, wherein the one or more processors execute the instructions to:
• receive a downlink fractional control channel from a non-serving cell;
• estimate a quality of the downlink fractional control channel from the non-serving cell over a specified time period;
• and
• derive downlink synchronization primitives in accordance with the quality of the downlink fractional control channel from the non-serving cell.

A user equipment (UE) configured to perform transmit power control (TPC), the UE comprising:

• a non-transitory memory storage comprising instructions;
• and
• one or more processors in communication with the memory storage, wherein the one or more processors execute the instructions to:
• receive a first downlink fractional control channel from a serving high-speed downlink shared channel (HS-DSCH) cell and a downlink fractional control channel from a non-serving HS-DSCH cell;
• and
• determine, during a gap in which an uplink dedicated physical control channel (DPCCH) is not transmitted, a transmit power of the uplink DPCCH in accordance with TPC fields in the downlink fractional control channel from the non-serving HS-DSCH cell.