Receiver for data communication

A receiver for data communication, comprising:

• an input buffer suitable for generating plural comparison signals by differentially comparing plural input signals transmitted from a transmitter through multiple channels;
• a clock data recovery circuit suitable for recovering a clock signal according to transitions of the plural comparison signals;
• a de-serializer suitable for generating plural groups of de-serialized signals by de-serializing the plural comparison signals at a preset de-serialization ratio in response to the recovered clock signal;
• a D flip-flop suitable for generating plural delayed signals by delaying last de-serialized signal of each of the plural groups by a preset time in synchronization to the recovered clock signal;
• and
• a symbol decoder suitable for comparing current and previous ones included in the plural delayed signals of previous input signals and the de-serialized signals in the plural groups of current input signals, and generating plural symbol signals based on a preset state diagram defining correspondence relationship between the plural symbol signals and changes between current and previous states of the plural comparison signals,
• wherein the input buffer, the clock data recovery circuit and the de-serializer operate at a full rate, and
• wherein the D flip-flop and the symbol decoder operate at a rate lower than the full rate by the preset de-serialization ratio.