Method of testing the resistance of a circuit to a side channel analysis of second order or more

A system for testing a circuit, the system comprising:

• a memory;
• and
• a processing unit configured to execute instructions in the memory, and configured to:
• acquire, via a measuring device, a plurality of value sets, each value set including values of a physical quantity or values of logic signals linked to an activity of the circuit to be tested when the circuit executes an operation of an operation set of distinct cryptographic operations applied to a same data to be discovered, the values of the physical quantity or the values of logic signals being acquired by a measuring device coupled to the circuit;
• select at least two subsets of values in each value set;
• for each value set, compute combined values combining together one value in each value subset;
• for each value set, count occurrence numbers of values transformed by a first surjective function applied to the combined values of the value set to form a respective occurrence number set for each value set;
• for each operation of the operation set, and each of possible values of a part of the data to be discovered, compute a partial operation result;
• compute cumulative occurrence number sets of cumulative occurrence numbers, each cumulative occurrence number set being obtained by adding occurrence number sets corresponding to operations of the operation set, which when applied to a same value or equivalent value of the possible values of the part of the data to be discovered, provide one of the partial operation results having a same transformed value resulting from an application of a second surjective function;
• and
• analyze the cumulative occurrence number sets to determine the part of the data to be discovered, in which, if the data to be discovered has leaked into the plurality of value sets, the part of the data to be discovered is in the cumulative occurrence number sets corresponding to the value of the part of the data to be discovered.

A non-transitory computer-readable medium carrying one or more sequences of instructions, which when executed by one or more processors, cause the one or more processors to:

• acquire a plurality of value sets, each value set including values of a physical quantity or values of logic signals linked to an activity of a circuit to be tested when the circuit executes an operation of an operation set of distinct cryptographic operations applied to a same data to be discovered;
• select at least two subsets of values in each value set;
• for each value set, compute combined values combining together one value in each value subset;
• for each value set, count occurrence numbers of values transformed by a first surjective function applied to the combined values of the value set to form a respective occurrence number set for each value set;
• for each operation of the operation set, and each of possible values of a part of the data to be discovered, compute a partial operation result;
• compute cumulative occurrence number sets of cumulative occurrence numbers, each cumulative occurrence number set being obtained by adding occurrence number sets corresponding to operations of the operation set, which when applied to a same value or equivalent value of the possible values of the part of the data to be discovered, provide one of the partial operation results having a same transformed value resulting from an application of a second surjective function;
• and
• analyze the cumulative occurrence number sets to determine the part of the data to be discovered, in which, if the data to be discovered has leaked into the plurality of value sets, the part of the data to be discovered is in the cumulative occurrence number sets corresponding to the value of the part of the data to be discovered.