Pattern based estimation of errors in ADC

A method of converting an input signal in an analog to digital converter (ADC) comprising:

• generating a flash output in response to the input signal;
• generating a known pattern by an error correction block;
• generating a residual code in response to the input signal, the known pattern and an analog PRBS (pseudo random binary sequence) signal;
• and
• averaging the residual code over T cycles to generate an averaged code, where T is an integer.

A computing device comprising:

• a processing unit;
• a memory module coupled to the processing unit;
• and
• a plurality of logic units coupled to the processing unit and the memory module, at least one logic unit of the plurality of logic units comprising an ADC, the ADC comprising:
• a flash ADC configured to generate a flash output in response to an input signal;
• an error correction block configured to generate a known pattern;
• and
• a residual ADC configured to generate a residual code in response to the input signal, the known pattern and an analog PRBS (pseudo random binary sequence)signal.