Amplifier architecture using positive envelope feedback
AssigneeSkyworks Solutions, Inc.
InventorsSmarjeet Sharma, Nicolas Gerard Constantin
Life of this patent
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Abstract
Described herein are power amplifier (PA) architectures that improve PA performance (e.g., efficiency, linearity, etc.) over an extended range of the operating power levels of the PA. These architectures can be implemented on a single chip to provide a single-chip standalone PA solution. This improvement comes with little additional complexity, little additional current consumption, and/or little additional chip area. The architectures utilize a dynamic biasing technique using positive envelope feedback based at least in part on an instantaneous envelope signal at an output of a power amplifier.
Claims20
A power amplifier architecture comprising:
- a multi-stage amplifier having an input port and an output port, the multi-stage amplifier to receive an input signal at the input port and to provide an amplified output signal at the output port;
- an envelope detector coupled to the output port of the multi-stage amplifier, the envelope detector configured to receive a signal corresponding to the amplified output signal and to generate an envelope signal related to an envelope of the amplified output signal;
- and
- a dynamic bias signal generator coupled to the envelope detector and to the multi-stage amplifier, the dynamic bias signal generator configured to receive the envelope signal from the envelope detector and to scale the envelope signal using a voltage divider, to receive a DC signal, to generate a dynamic bias signal related to the envelope of the amplified output signal with the DC signal being used to offset the scaled envelope signal to generate the dynamic bias signal, and to provide the dynamic bias signal to the multi-stage amplifier.
A radio-frequency (RF) module comprising:
- a packaging substrate configured to receive a plurality of components;
- and
- a power amplification system implemented on the packaging substrate, the power amplification system including a multi-stage amplifier configured to provide an amplified output signal having an envelope, an envelope detector configured to detect the envelope of the amplified output signal, and a resistive voltage shifter configured to generate a dynamic bias signal related to the detected envelope of the amplified output signal and to provide the dynamic bias signal to the multi-stage amplifier.
A wireless device comprising:
- a transceiver configured to generate an input radio-frequency (RF) signal;
- a front-end module (FEM) in communication with the transceiver, the FEM including a packaging substrate configured to receive a plurality of components, the FEM further including a power amplification system implemented on the packaging substrate, the power amplification system configured to amplify the input RF signal to generate an amplified output RF signal, the power amplification system including a multi-stage amplifier configured to provide the amplified output signal having an envelope, an envelope detector configured to detect the envelope of the amplified output signal, and a resistive voltage shifter configured to generate a dynamic bias signal related to the detected envelope of the amplified output signal and to provide the dynamic bias signal to the multi-stage amplifier;
- and
- an antenna in communication with the FEM, the antenna configured to transmit the output RF signal.
A power amplifier architecture comprising:
- a multi-stage amplifier having an input port and an output port, the multi-stage amplifier to receive an input signal at the input port and to provide an amplified output signal at the output port;
- an envelope detector coupled to the output port of the multi-stage amplifier, the envelope detector configured to receive a signal corresponding to the amplified output signal and to generate an envelope signal related to an envelope of the amplified output signal;
- and
- a dynamic bias signal generator coupled to the envelope detector and to the multi-stage amplifier, the dynamic bias signal generator configured to receive the envelope signal from the envelope detector, to generate a dynamic bias signal related to the envelope of the amplified output signal, and to provide the dynamic bias signal to the multi-stage amplifier, with a loop gain of the architecture being less than or equal to 0 dB, the loop gain including a gain of an up-conversion gain through the multi-stage amplifier and a gain of a signal path through the envelope detector and the dynamic bias signal generator.
Dependencies are inferred from the claim text.