Semiconductor device having a decreased switching loss

A semiconductor device comprising:

• a bridge circuit including three switching arm sections connected in parallel for three phases, each the three switching arm sections having respective series-connected first semiconductor elements and second semiconductor elements;
• and
• a control circuit configured to control the first semiconductor elements and the second semiconductor elements of the bridge circuit to perform a switching operation to drive an inductive load, wherein
• the first semiconductor elements constitute upper arms of the bridge circuit,
• the second semiconductor elements constitute lower arms of the bridge circuit,
• for each of the three switching arm sections,
• the respective first semiconductor element includes a low switching loss semiconductor element having a switching loss which is smaller than a switching loss of the respective second semiconductor element, and
• the respective second semiconductor element includes an insulated gate bipolar transistor (IGBT) as a low conduction loss semiconductor element having a conduction loss which is smaller than a conduction loss of the first semiconductor element, and
• a freewheeling diode is connected in anti-parallel with the respective second semiconductor element,
• the control circuit drives the inductive load, by a two-phase modulation system of periodically fixing each phase voltage by
• controlling each of the upper arms to alternate among an upper-arm OFF state and a pulse width modulated (PWM) state, and
• controlling each of the lower arms to alternate among an OFF state, a lower-arm pulse width modulated (PWM) state, and an always-ON state, such that the lower arm of one of the three switching arm section is controlled from the lower-arm pulse width modulated (PWM) state to the always ON state while an upper arm of the one of the three switching arm sections is controlled to be in the upper-arm OFF state.

A semiconductor device having:

• a first semiconductor element and a second semiconductor element, connected in series;
• a first gate drive circuit;
• and
• a second gate drive circuit, wherein
• the first semiconductor element includes a low switching loss semiconductor element having a switching loss which is smaller than a switching loss of the second semiconductor element,
• the first gate drive circuit is connected to a gate and an emitter of the low switching loss semiconductor element, the first gate drive circuit being configured to control the gate of the low switching loss semiconductor element based on a reference voltage provided by the connection to the emitter, and
• the second semiconductor element includes an insulated gate bipolar transistor (IGBT) as a low conduction loss semiconductor element having a conduction loss which is smaller than a conduction loss of the first semiconductor element,
• a freewheeling diode is connected in anti-parallel with the respective second semiconductor element,
• the second gate drive circuit and an emitter of the low conduction loss semiconductor element being connected to a common ground terminal of the semiconductor device,
• the second gate drive circuit is connected to a gate of the low conduction loss semiconductor element, and is configured to control the gate of the low conduction loss semiconductor element;
• a control circuit configured to
• control the first semiconductor element to alternate among an OFF state and a pulse width modulated (PWM) state, and
• control the second semiconductor element to alternate among an OFF state, a pulse width modulated (PWM) state, and an always-ON state;
• and
• a third semiconductor element and a fourth semiconductor element connected in series, the third semiconductor element and the fourth semiconductor element connected in parallel to the first semiconductor element and the second semiconductor element, wherein
• the third semiconductor element includes a wide bandgap diode of a switching loss which is smaller than a switching loss of an insulated gate bipolar transistor, and
• the fourth semiconductor element includes a low conduction loss semiconductor element having a conduction loss which is smaller than a conduction loss of a MOSFET.

A semiconductor device comprising:

• a first semiconductor element and a second semiconductor element, connected in series, wherein
• the first semiconductor element includes a low switching loss semiconductor element having a switching loss which is smaller than a switching loss of the second semiconductor element, and
• the second semiconductor element includes an insulated gate bipolar transistor (IGBT) as a low conduction loss semiconductor element having a conduction loss which is smaller than a conduction loss of the first semiconductor element,
• a first gate drive circuit connected to a gate and an emitter of the low switching loss semiconductor element, the first gate drive circuit being configured to control the gate of the low switching loss semiconductor element based on a reference voltage provided by the connection to the emitter;
• a second gate drive circuit connected to a gate of the low conduction loss semiconductor element, and configured to control the gate of the low conduction loss semiconductor element;
• a freewheeling diode connected in anti-parallel with the second semiconductor element;
• and
• a control circuit configured to
• control the first semiconductor element to alternate among an OFF state and a pulse width modulated (PWM) state, and
• control the second semiconductor element to alternate among an OFF state, a pulse width modulated (PWM) state, and an always-ON state,
• wherein the second gate drive circuit and an emitter of the low conduction loss semiconductor element are connected to a common ground terminal of the semiconductor device.