Forming eDRAM unit cell with VFET and via capacitance

Abstract

A method is presented for forming an embedded dynamic random access memory (eDRAM) device. The method includes forming a FinFET (fin field effect transistor) device having a plurality of fins over a substrate and forming a via cap adjacent the FinFET device by forming a contact trench extending into a bottom spacer, depositing a conductive liner within the contact trench, filling the contact trench with an organic dielectric layer (ODL), etching portions of the conductive liner and a portion of the ODL, and removing the ODL. The method further includes depositing a high-k material within the contact trench and depositing a conducting material over the high-k material.

Dependencies are inferred from the claim text.