Embedded bottom metal contact formed by a self-aligned contact process for vertical transistors
AssigneeInternational Business Machines Corporation
InventorsSu Chen Fan, Zuoguang Liu, Heng Wu, Tenko Yamashita
Life of this patent
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Abstract
Embodiments are directed to a method and resulting structures for a vertical field effect transistor (VFET) having an embedded bottom metal contact. A semiconductor fin is formed on a doped region of a substrate. A portion of the doped region adjacent to the semiconductor fin is recessed and an embedded contact is formed on the recessed portion. A material of the conductive rail is selected such that a conductivity of the embedded contact is higher than a conductivity of the doped region.
Claims20
A method for forming a semiconductor device, the method comprising:
- forming a semiconductor fin on a doped region of a substrate;
- recessing a surface of the doped region, the recessed surface comprising a first portion adjacent to a first sidewall of the semiconductor fin, a second portion adjacent to a second sidewall of the semiconductor fin, and a third portion adjacent to a third sidewall of the semiconductor fin;
- and
- forming a conductive layer on the first portion, the second portion, and the third portion of the recessed surface of the doped region;
- wherein a conductivity of the conductive layer is higher than a conductivity of the doped region.
A method for forming a semiconductor device, the method comprising:
- forming a semiconductor fin on a doped region of a substrate;
- forming a conductive gate over a channel region of the semiconductor fin;
- recessing a portion of the doped region adjacent to the semiconductor fin;
- forming a conductive rail on the recessed portion of the doped region;
- forming a dielectric layer between the conductive rail and the conductive gate;
- forming a first conductive contact on a surface of the conductive rail;
- and
- forming a second conductive contact on a surface of the semiconductor fin;
- wherein a conductivity of the conductive rail is higher than a conductivity of the doped region.
A method of operating a semiconductor device, the method comprising:
- providing a semiconductor device comprising:
- a semiconductor fin on a bottom doped region of a substrate;
- a conductive gate formed over a channel region of the semiconductor fin;
- a top doped region on a surface of the semiconductor fin;
- a top source/drain (S/D) contact on a surface of the top doped region;
- a conductive rail on a recessed portion of the doped region;
- and
- a bottom S/D contact on a surface of the conductive rail;
- and
- passing a current from the top S/D contact to the bottom S/D contact through a portion of the conductive rail.
Dependencies are inferred from the claim text.