Replacement metal gate stack with oxygen and nitrogen scavenging layers
AssigneeInternational Business Machines Corporation
InventorsTakashi Ando, Pouya Hashemi, Choonghyun Lee
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Abstract
A method is presented for tuning work functions of transistors. The method includes forming a high-k dielectric over a semiconductor substrate, and forming a work function stack over the high-k dielectric, the work function stack including a first layer having a nitrogen (N) scavenging element, a second layer having an oxygen (O) scavenging element, and a third layer being a conducting layer.
Claims20
A method for tuning a work function of a transistor having a dummy gate structure between a set of spacers, the method comprising:
- forming a high-k dielectric over a semiconductor substrate;
- removing the dummy gate structure to define a recess;
- and
- forming a three-layer work function stack within the recess, the three-layer work function stack within the recess including a first layer having a nitrogen (N) scavenging element, a second layer having an oxygen (O) scavenging element, and a third layer being a conducting layer, where the first, second, and third layers are constructed to include a common metal;
- wherein the first layer is a tantalum (Ta) doped metal nitride layer, the second layer is a titanium aluminum (TiAl) layer, and the third layer is a TiN layer.
A structure for tuning a work function of a transistor having a dummy gate structure between a set of spacers, the structure comprising:
- a high-k dielectric formed over a semiconductor substrate;
- and
- a three-layer work function stack formed within a recess defined after removing the dummy gate structure, the three-layer work function stack within the recess including a first layer having a nitrogen (N) scavenging element, a second layer having an oxygen (O) scavenging element, and a third layer being a conducting layer, where the first, second, and third layers are constructed to include a common metal;
- wherein the first layer is a tantalum (Ta) doped metal nitride layer, the second layer is a titanium aluminum (TiAl) layer, and the third layer is a TiN layer.
A method for tuning a work function of a transistor having a dummy gate structure between a set of spacers, the method comprising:
- forming source/drain regions within a semiconductor substrate;
- forming a high-k dielectric over the semiconductor substrate;
- removing the dummy gate structure to define a recess;
- and
- forming a three-layer work function stack within the recess, the three-layer work function stack within the recess including a first layer having a nitrogen (N) scavenging element, a second layer having an oxygen (O) scavenging element, and a third layer being a conducting layer, where the first, second, and third layers are constructed to include a common metal;
- wherein the first layer is a tantalum (Ta) doped metal nitride layer, the second layer is a titanium aluminum (TiAl) layer, and the third layer is a TiN layer.
Dependencies are inferred from the claim text.