Semiconductor device, solid-state image sensor and camera system

An electronic apparatus comprising:

• an imaging device, including:
• a pixel array unit;
• a plurality of vias located outside of and not overlapping the pixel array unit, the plurality of vias including a first via and a second via;
• a first substrate including the pixel array unit and the plurality of vias;
• and
• a second substrate including a plurality of counters,
• wherein,
• the pixel array unit is located between the first via and the second via,
• the first substrate is stacked on the second substrate, and
• the first substrate is electrically connected to the second substrate,
• an optical system, including a lens that guides light to the imaging device;
• and
• a drive circuit that drives the imaging device.

An imaging device comprising:

• a pixel array unit including a plurality of photodiodes and first and second outer edges that are parallel to one another, wherein the plurality of photodiodes are disposed between the first and second outer edges;
• a plurality of vias located outside of the pixel array unit, the plurality of vias including a first via and a second via;
• a first substrate including the pixel array unit and the plurality of vias;
• and
• a second substrate including a plurality of counters,
• wherein,
• the pixel array unit is located between the first via and the second via such that the first via is adjacent to the first outer edge and the second via is adjacent to the second outer edge,
• the first substrate is stacked on the second substrate, and
• the first substrate is electrically connected to the second substrate.

An imaging device comprising:

• a pixel array unit;
• a plurality of vias located outside of the pixel array unit, the plurality of vias including a first via and a second via;
• a first substrate including the pixel array unit and the plurality of vias;
• and
• a second substrate including a plurality of counters,
• wherein,
• the pixel array unit is located between the first via and the second via such that the first via is adjacent to a first outer edge of the pixel array unit and the second via is adjacent to a second outer edge of the pixel unit,
• the first substrate is stacked on the second substrate, and
• the first substrate is electrically connected to the second substrate.