Integrated circuit structure having VFET and embedded memory structure and method of forming same

An integrated circuit structure comprising:

• a first device region including a vertical flash memory device, the first device region including:
• a floating gate structure substantially surrounding a first fin that is over a substrate;
• a first bottom source/drain within the substrate, and beneath the first fin and the floating gate structure;
• a first top source/drain over the first fin and the floating gate structure;
• a first spacer substantially surrounding the first top source/drain and disposed over the floating gate structure;
• and
• a gate structure substantially surrounding and insulated from the floating gate structure, the gate structure being disposed over the substrate and having a height greater than a height of the floating gate, the gate structure having a top surface that is approximately planar with a top surface of the first spacer;
• and
• a second device region including a vertical fin-shaped field effect transistor (VFET), the VFET including:
• a VFET gate structure surrounding a second fin that is over the substrate;
• a second bottom source/drain within the substrate, and beneath the second fin and the second gate structure;
• a second top source/drain over the second fin and the second gate structure;
• and
• a second spacer substantially surrounding the second top source/drain.