Contact formation in semiconductor devices

A method for fabricating a p-type field effect transistor (pFET) device and an n-type field effect transistor (nFET) device, the method comprising:

• forming a contact trench through an inter-level dielectric layer and a spacer layer, the inter-level dielectric layer being formed over the spacer layer, the contact trench exposing a p-type source/drain region of the pFET device and exposing an n-type source/drain region of the NFET device, wherein a gate stack is included within the spacer layer;
• forming a p-type alloyed layer on top of the p-type source/drain region of the pFET device and on top of the n-type source/drain region of the nFET device;
• converting the p-type alloyed layer on top of the n-type source/drain region of the nFET device into a metallic alloyed layer on top of the n-type source/drain region;
• and
• forming a metallic liner layer in the contact trench such that the metallic liner layer is on top of the p-type alloyed layer of the pFET device and on top of the metallic alloyed layer of the nFET device.