Semiconductor memory device
AssigneeToshiba Memory Corporation
InventorKenichi Sawanaka
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes a housing having a wall, a circuit board located in the housing and spaced from the wall and extending along the surface of the wall, a memory located on the circuit board, a heat conduction member interposed, and compressed, between the wall and the memory. The wall includes an uneven region comprising contact portions contacting the heat conduction member and recess portions located between the contact portions. The recess portions are recessed inwardly of the wall from the ends of the contact portions in a direction away from the location of the memory.
Claims20
A semiconductor memory device comprising:
- a housing having a wall;
- a circuit board located in the housing and spaced from the wall, and extending along a surface of the wall;
- a memory located above the circuit board;
- and
- a heat conduction member interposed between the wall and the memory, the heat conduction member being formed of an elastic material and elastically compressed therebetween, wherein
- the wall includes an uneven region comprising contact portions that contact the heat conduction member and recess portions located between the contact portions, the recess portions recessed inwardly of the wall from ends of the contact portions in a direction away from the memory.
A semiconductor device package configured to support one memory device to be located therein or thereon among a plurality of memory devices having a perimeter wall, a first surface, a second surface opposite to the first surface, and a thickness between the first and second surfaces, wherein the thicknesses of different memory devices among the plurality of memory devices are different, comprising:
- a housing having a wall;
- a circuit board located in the housing and spaced from the wall, and extending along a surface of the wall;
- and
- a heat conduction member formed of an elastic material, wherein
- the wall includes an uneven region comprising contact portions contacting the heat conduction member and recess portions located between the contact portions, the recess portions recessed inwardly of the wall from ends of the contact portions in a direction away from a mounting location of said one memory device, and
- the heat conduction member is positioned to be elastically compressed between said one memory device and the wall when said one memory device is mounted in the semiconductor device package.
A semiconductor memory device, comprising:
- a housing having a first wall, the first wall including a plurality of recesses extending inwardly thereof;
- a compressible heat transfer member comprising a first surface and a second surface opposite to the first surface, the first surface thereof contacting the first wall, the compressible heat transfer member being formed of an elastic material, elastically compressed, and having a first thickness between the first and second surfaces thereof less than a thickness of the compressible heat transfer member in a non-compressed state;
- a memory having a third surface and a fourth surface opposite to the third surface, and a second thickness between the third and fourth surfaces, the third surface contacting the second surface of the compressible heat transfer member;
- and
- a circuit board facing the fourth surface of the memory and spaced from the first wall by a gap distance, wherein
- the sum of the first thickness of the heat transfer member and the second thickness of the memory is equal to the gap distance.
Dependencies are inferred from the claim text.