Semiconductor interconnect structure having a graphene barrier layer
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShin-Yi Yang, Ming-Han Lee, Shau-Lin Shue
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Abstract
The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to a semiconductor interconnect structure incorporating a graphene barrier layer. The present disclosure provides a method of forming a graphene barrier layer on select surfaces using a self-assembly monolayer (SAM). The SAM layer can be selectively formed on dielectric surfaces and annealed to form thin graphene barrier layers. The thickness of the graphene barrier layers can be selected by choosing different alkyl groups of the SAM layer.
Claims20
A semiconductor structure comprising:
- a substrate;
- a metal layer formed over the substrate;
- a dielectric layer formed over the metal layer;
- a graphene barrier layer formed on side surfaces of the dielectric layer;
- and
- a conductive layer formed in contact with a portion of the metal layer, wherein at least a portion of the graphene barrier layer is between the conductive layer and the dielectric layer.
A semiconductor structure comprising:
- a conductive interconnect layer;
- a dielectric layer formed over the conductive interconnect layer;
- a first conductive layer formed in the dielectric layer and in contact with a portion of the conductive interconnect layer;
- a second conductive layer formed in the dielectric layer and in contact with the first conductive layer;
- and
- a graphene barrier layer formed between the first conductive layer and the dielectric layer and between the second conductive layer and the dielectric layer.
A semiconductor interconnect structure comprising:
- a substrate;
- a metal layer formed over the substrate;
- a patterned dielectric layer over the substrate and over a portion of the metal layer;
- a graphene layer formed on surfaces of the patterned dielectric layer;
- and
- a conductive layer formed on the graphene layer and in contact with the portion of the metal layer, wherein at least a portion of the graphene layer is between the conductive layer and the dielectric layer.
Dependencies are inferred from the claim text.