Chip package assembly with enhanced interconnects and method for fabricating the same
AssigneeXilinx, Inc.
InventorsJaspreet Singh Gandhi, Tien-Yu Lee, Henley Liu, Ivor G. Barber, Suresh Ramalingam
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AssigneeXilinx, Inc.
InventorsJaspreet Singh Gandhi, Tien-Yu Lee, Henley Liu, Ivor G. Barber, Suresh Ramalingam
Estimating the term…
An integrated circuit interconnects are described herein that are suitable for forming integrated circuit chip packages. In one example, an integrated circuit interconnect is provided that includes a package substrate having a plurality of solder balls coupled to a plurality of contact pads. The package substrate includes a solder mask having a plurality of stepped openings, a plurality of contact pads, and circuitry disposed in the package substrate and coupled to the plurality of contact pads. The solder mask defines a top side of the package substrate. The stepped openings expose the contact pads through solder mask.
An integrated circuit interconnect comprising:
A method for forming an interconnect of an integrated circuit package, the method comprising:
A package structure comprising:
Dependencies are inferred from the claim text.