Low-overhead mechanism to detect address faults in ECC-protected memories

A method comprising:

• receiving a command to read from a memory array at an address value;
• reading a data value and an error correction code (ECC) value from the memory array based on the address value, wherein, during a previous write of the data value, the ECC value was generated based on the data value and its write address value;
• performing a decoding operation using the address value, the data value and the ECC value;
• identifying one or more errors in the address value or write address value based on the decoding operation;
• and,
• rolling back stored data values of all or a portion of the memory array to an earlier state upon detecting the one or more errors.

A computing system comprising:

• one or more processors for processing of data;
• a memory apparatus for storage of data, the memory apparatus including a memory array;
• a wireless transmitter or receiver and one or more antennae for transmission or reception of data;
• and,
• the computing system further comprising error correction code (ECC) logic, including:
• an ECC encoder to encode an ECC value based on a data value and a respective write address value for the writing of the data value into the memory array,
• an ECC decoder to receive a read ECC value and read data value from the memory array and to also receive a read address value;
• wherein the ECC logic is to detect and correct an error in the read or write address values based on the read ECC value, the read address value, and the read data value;
• wherein the apparatus is to roll back stored data values of all or a portion of the memory array to an earlier state upon detecting the error in the read or write address values.

One or more non-transitory computer-readable storage mediums having stored thereon data representing sequences of instructions that, when executed by one or more processors, cause the one or more processors to perform operations comprising:

• receiving a command to read from a memory array at an address value;
• reading a data value and an error correction code (ECC) value from the memory array based on the address value, wherein, during a previous write of the data value, the ECC value was generated based on the data value and its write address value;
• performing a decoding operation using the address value, the data value and the ECC value;
• and,
• identifying one or more errors in the address value or write address value based on the decoding operation;
• and,
• rolling back stored data values of all or a portion of the memory array to an earlier state upon detecting the one or more errors.