Semiconductor device
AssigneeSK hynix Inc.
InventorsYong Mi Kim, Jae Il Kim
Life of this patent
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Abstract
A semiconductor device includes a delay selection signal generation circuit, an internal read signal generation circuit, and an internal write signal generation circuit. The delay selection signal generation circuit generates a delay selection signal in response to an information code signal. The internal read signal generation circuit generates an internal read signal from a mask write signal in response to the delay selection signal and a clock. The internal write signal generation circuit delays the mask write signal by a predetermined delay period to generate an internal write signal.
Claims20
A semiconductor device comprising:
- a delay selection signal generation circuit configured to generate a delay selection signal in response to an information code signal;
- an internal read signal generation circuit configured to generate an internal read signal according to a mask write signal, the delay selection signal, and a clock signal;
- and
- an internal write signal generation circuit configured to delay the mask write signal by a predetermined delay period to generate an internal write signal.
A semiconductor device comprising:
- an internal read signal generation circuit configured to delay a mask write signal by a first delay period in response to a delay selection signal to generate an internal read signal, the delay selection signal being generated according to an information code signal;
- an internal write signal generation circuit configured to delay the mask write signal by a second delay period to generate an internal write signal;
- and
- a data storage circuit configured to output data stored in a memory cell array in response to the internal read signal, and store correction data in the memory cell array in response to the internal write signal.
Dependencies are inferred from the claim text.