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US 10,319,449 B1Granted
Memory device and operation method thereof
AssigneeMacronix International Co., Ltd.
InventorShang-Chi Yang
Life of this patent
Estimating the term…
Abstract
A memory device is provided. The memory device includes: a memory array having a plurality of cells; a regulator, coupled to the memory, the regulator being configured to provide a bit line voltage to a selected cell of the memory array and to provide a bias voltage; and a controllable current source, coupled to the memory array, the controllable current source being configured to conduct a controllable current in the controllable current source until a cell current of the selected cell reaches a threshold.
Claims8
A memory device including:
- a memory array having a plurality of cells,
- a regulator, coupled to the memory, the regulator being configured to provide a bit line voltage to a selected cell of the memory array and to provide a bias voltage, and
- a controllable current source, coupled to the memory array, the controllable current source being configured to conduct a controllable current in the controllable current source until a cell current of the selected cell reaches a threshold and to maintain the bit line voltage of the selected cell of the memory array via conduction of the controllable current in the controllable current source.
An operation method for a memory device, the operation method including:
- providing a bit line voltage to a selected cell of the memory device;
- conducting a controllable current to maintain the bit line voltage of the selected cell of the memory array via conduction of the controllable current in a controllable current source;
- and
- shutting down the controllable current when a cell current of the selected cell reaches a threshold.
1 more element
Dependencies are inferred from the claim text.