Resistive processing unit weight reading via collection of differential current from first and second memory elements

An integrated circuit comprising:

• an array of two or more resistive processing units;
• wherein a given one of the resistive processing units comprises:
• a first analog memory element;
• a second analog memory element connected in series with the first analog memory element;
• and
• a control circuit coupled to the first analog memory element and the second analog memory element, the control circuit configured to read out a synaptic weight value of the resistive processing unit by collecting a differential current from the first analog memory element and the second analog memory element.

A method for differential weight reading of a resistive processing unit, comprising:

• applying a voltage difference across a first analog memory element and a second analog memory element of the resistive processing unit utilizing a control circuit, the first analog memory element being connected in series with the second analog memory element;
• applying one or more read pulse voltages utilizing the control circuit;
• and
• reading a synaptic weight value of the resistive processing unit by collecting a differential current from the first analog memory element and the second analog memory element on at least one of a read column line and a read row line coupled to a terminal between the first analog memory element and the second analog memory element.